diff options
author | Lakshmanan M <lm@nvidia.com> | 2016-06-02 00:04:46 -0400 |
---|---|---|
committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-06-07 15:31:34 -0400 |
commit | 6299b00beb9dabdd53c211b02658d022827b3232 (patch) | |
tree | 941d8dd8aae8f7f8c73329e182984c36a5a9bf88 /drivers/gpu/nvgpu/vgpu | |
parent | 3d7263d3cafdcfc57a6d6b9f829562845d116294 (diff) |
gpu: nvgpu: Add multiple engine and runlist support
This CL covers the following modification,
1) Added multiple engine_info support
2) Added multiple runlist_info support
3) Initial changes for ASYNC CE support
4) Added ASYNC CE interrupt handling support
for gm206 GPU family
5) Added generic mechanism to identify the
CE engine pri_base address for gm206
(CE0, CE1 and CE2)
6) Removed hard coded engine_id logic and
made generic way
7) Code cleanup for readability
JIRA DNVGPU-26
Change-Id: I2c3846c40bcc8d10c2dfb225caa4105fc9123b65
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1155963
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu')
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | 64 |
1 files changed, 28 insertions, 36 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c index 0895b757..3e89e81f 100644 --- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | |||
@@ -163,60 +163,52 @@ static int init_engine_info(struct fifo_gk20a *f) | |||
163 | 163 | ||
164 | static int init_runlist(struct gk20a *g, struct fifo_gk20a *f) | 164 | static int init_runlist(struct gk20a *g, struct fifo_gk20a *f) |
165 | { | 165 | { |
166 | struct fifo_engine_info_gk20a *engine_info; | ||
167 | struct fifo_runlist_info_gk20a *runlist; | 166 | struct fifo_runlist_info_gk20a *runlist; |
168 | struct device *d = dev_from_gk20a(g); | 167 | struct device *d = dev_from_gk20a(g); |
169 | u32 runlist_id; | 168 | s32 runlist_id = -1; |
170 | u32 i; | 169 | u32 i; |
171 | u64 runlist_size; | 170 | u64 runlist_size; |
172 | 171 | ||
173 | gk20a_dbg_fn(""); | 172 | gk20a_dbg_fn(""); |
174 | 173 | ||
175 | f->max_runlists = fifo_eng_runlist_base__size_1_v(); | 174 | f->max_runlists = g->ops.fifo.eng_runlist_base_size(); |
176 | f->runlist_info = kzalloc(sizeof(struct fifo_runlist_info_gk20a) * | 175 | f->runlist_info = kzalloc(sizeof(struct fifo_runlist_info_gk20a) * |
177 | f->max_runlists, GFP_KERNEL); | 176 | f->max_runlists, GFP_KERNEL); |
178 | if (!f->runlist_info) | 177 | if (!f->runlist_info) |
179 | goto clean_up; | 178 | goto clean_up_runlist; |
180 | 179 | ||
181 | engine_info = f->engine_info + ENGINE_GR_GK20A; | 180 | memset(f->runlist_info, 0, (sizeof(struct fifo_runlist_info_gk20a) * |
182 | runlist_id = engine_info->runlist_id; | 181 | f->max_runlists)); |
183 | runlist = &f->runlist_info[runlist_id]; | 182 | |
183 | for (runlist_id = 0; runlist_id < f->max_runlists; runlist_id++) { | ||
184 | runlist = &f->runlist_info[runlist_id]; | ||
184 | 185 | ||
185 | runlist->active_channels = | 186 | runlist->active_channels = |
186 | kzalloc(DIV_ROUND_UP(f->num_channels, BITS_PER_BYTE), | 187 | kzalloc(DIV_ROUND_UP(f->num_channels, BITS_PER_BYTE), |
187 | GFP_KERNEL); | 188 | GFP_KERNEL); |
188 | if (!runlist->active_channels) | 189 | if (!runlist->active_channels) |
189 | goto clean_up_runlist_info; | ||
190 | |||
191 | runlist_size = sizeof(u16) * f->num_channels; | ||
192 | for (i = 0; i < MAX_RUNLIST_BUFFERS; i++) { | ||
193 | int err = gk20a_gmmu_alloc(g, runlist_size, &runlist->mem[i]); | ||
194 | if (err) { | ||
195 | dev_err(d, "memory allocation failed\n"); | ||
196 | goto clean_up_runlist; | 190 | goto clean_up_runlist; |
197 | } | ||
198 | } | ||
199 | mutex_init(&runlist->mutex); | ||
200 | 191 | ||
201 | /* None of buffers is pinned if this value doesn't change. | 192 | runlist_size = sizeof(u16) * f->num_channels; |
202 | Otherwise, one of them (cur_buffer) must have been pinned. */ | 193 | for (i = 0; i < MAX_RUNLIST_BUFFERS; i++) { |
203 | runlist->cur_buffer = MAX_RUNLIST_BUFFERS; | 194 | int err = gk20a_gmmu_alloc(g, runlist_size, &runlist->mem[i]); |
195 | if (err) { | ||
196 | dev_err(d, "memory allocation failed\n"); | ||
197 | goto clean_up_runlist; | ||
198 | } | ||
199 | } | ||
200 | mutex_init(&runlist->mutex); | ||
201 | |||
202 | /* None of buffers is pinned if this value doesn't change. | ||
203 | Otherwise, one of them (cur_buffer) must have been pinned. */ | ||
204 | runlist->cur_buffer = MAX_RUNLIST_BUFFERS; | ||
205 | } | ||
204 | 206 | ||
205 | gk20a_dbg_fn("done"); | 207 | gk20a_dbg_fn("done"); |
206 | return 0; | 208 | return 0; |
207 | 209 | ||
208 | clean_up_runlist: | 210 | clean_up_runlist: |
209 | for (i = 0; i < MAX_RUNLIST_BUFFERS; i++) | 211 | gk20a_fifo_delete_runlist(f); |
210 | gk20a_gmmu_free(g, &runlist->mem[i]); | ||
211 | |||
212 | clean_up_runlist_info: | ||
213 | kfree(runlist->active_channels); | ||
214 | runlist->active_channels = NULL; | ||
215 | |||
216 | kfree(f->runlist_info); | ||
217 | f->runlist_info = NULL; | ||
218 | |||
219 | clean_up: | ||
220 | gk20a_dbg_fn("fail"); | 212 | gk20a_dbg_fn("fail"); |
221 | return -ENOMEM; | 213 | return -ENOMEM; |
222 | } | 214 | } |
@@ -243,7 +235,7 @@ static int vgpu_init_fifo_setup_sw(struct gk20a *g) | |||
243 | if (err) | 235 | if (err) |
244 | return -ENXIO; | 236 | return -ENXIO; |
245 | 237 | ||
246 | f->max_engines = ENGINE_INVAL_GK20A; | 238 | f->max_engines = nvgpu_get_litter_value(g, GPU_LIT_HOST_NUM_ENGINES); |
247 | 239 | ||
248 | f->userd_entry_size = 1 << ram_userd_base_shift_v(); | 240 | f->userd_entry_size = 1 << ram_userd_base_shift_v(); |
249 | 241 | ||