diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2014-11-12 07:22:35 -0500 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:12:19 -0400 |
commit | 2d71d633cf754e15c5667215c44086080c7c328d (patch) | |
tree | 62e64ee0c4aa8128abc66fa83a66c1dd678965b3 /drivers/gpu/nvgpu/vgpu | |
parent | 1deb73b9c6512c6f0a296e35145c49233ea47f74 (diff) |
gpu: nvgpu: Physical page bits to be per chip
Retrieve number of physical page bits based on chip.
Bug 1567274
Change-Id: I5a0f6a66be37f2cf720d66b5bdb2b704cd992234
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/601700
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu')
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/mm_vgpu.c | 5 |
2 files changed, 4 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c index 80a89e1e..24b9f4be 100644 --- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | |||
@@ -317,7 +317,7 @@ static int vgpu_init_fifo_setup_sw(struct gk20a *g) | |||
317 | f->channel[chid].userd_cpu_va = | 317 | f->channel[chid].userd_cpu_va = |
318 | f->userd.cpuva + chid * f->userd_entry_size; | 318 | f->userd.cpuva + chid * f->userd_entry_size; |
319 | f->channel[chid].userd_iova = | 319 | f->channel[chid].userd_iova = |
320 | NV_MC_SMMU_VADDR_TRANSLATE(f->userd.iova) | 320 | gk20a_mm_smmu_vaddr_translate(g, f->userd.iova) |
321 | + chid * f->userd_entry_size; | 321 | + chid * f->userd_entry_size; |
322 | f->channel[chid].userd_gpu_va = | 322 | f->channel[chid].userd_gpu_va = |
323 | f->userd.gpu_va + chid * f->userd_entry_size; | 323 | f->userd.gpu_va + chid * f->userd_entry_size; |
diff --git a/drivers/gpu/nvgpu/vgpu/mm_vgpu.c b/drivers/gpu/nvgpu/vgpu/mm_vgpu.c index 7f1a5856..20f2b5ee 100644 --- a/drivers/gpu/nvgpu/vgpu/mm_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/mm_vgpu.c | |||
@@ -74,7 +74,7 @@ static u64 vgpu_locked_gmmu_map(struct vm_gk20a *vm, | |||
74 | struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(d); | 74 | struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(d); |
75 | struct tegra_vgpu_cmd_msg msg; | 75 | struct tegra_vgpu_cmd_msg msg; |
76 | struct tegra_vgpu_as_map_params *p = &msg.params.as_map; | 76 | struct tegra_vgpu_as_map_params *p = &msg.params.as_map; |
77 | u64 addr = gk20a_mm_iova_addr(sgt->sgl); | 77 | u64 addr = gk20a_mm_iova_addr(g, sgt->sgl); |
78 | u8 prot; | 78 | u8 prot; |
79 | 79 | ||
80 | gk20a_dbg_fn(""); | 80 | gk20a_dbg_fn(""); |
@@ -210,7 +210,7 @@ u64 vgpu_bar1_map(struct gk20a *g, struct sg_table **sgt, u64 size) | |||
210 | struct gk20a_platform *platform = gk20a_get_platform(g->dev); | 210 | struct gk20a_platform *platform = gk20a_get_platform(g->dev); |
211 | struct dma_iommu_mapping *mapping = | 211 | struct dma_iommu_mapping *mapping = |
212 | to_dma_iommu_mapping(dev_from_gk20a(g)); | 212 | to_dma_iommu_mapping(dev_from_gk20a(g)); |
213 | u64 addr = gk20a_mm_iova_addr((*sgt)->sgl); | 213 | u64 addr = gk20a_mm_iova_addr(g, (*sgt)->sgl); |
214 | struct tegra_vgpu_cmd_msg msg; | 214 | struct tegra_vgpu_cmd_msg msg; |
215 | struct tegra_vgpu_as_map_params *p = &msg.params.as_map; | 215 | struct tegra_vgpu_as_map_params *p = &msg.params.as_map; |
216 | int err; | 216 | int err; |
@@ -429,4 +429,5 @@ void vgpu_init_mm_ops(struct gpu_ops *gops) | |||
429 | gops->mm.l2_invalidate = vgpu_mm_l2_invalidate; | 429 | gops->mm.l2_invalidate = vgpu_mm_l2_invalidate; |
430 | gops->mm.l2_flush = vgpu_mm_l2_flush; | 430 | gops->mm.l2_flush = vgpu_mm_l2_flush; |
431 | gops->mm.tlb_invalidate = vgpu_mm_tlb_invalidate; | 431 | gops->mm.tlb_invalidate = vgpu_mm_tlb_invalidate; |
432 | gops->mm.get_physical_addr_bits = gk20a_mm_get_physical_addr_bits; | ||
432 | } | 433 | } |