gpu: nvgpu: vgpu: re-factor gr ctx management

Move the gr ctx management to the GPU HAL. Also,
add support for a new interface to allocate gr ctxsw
buffers.

Bug 1677153

Change-Id: I5a7980acf4de0de7dbd94b7dd20f91a6196dc989
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/806961
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/817009
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 24 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/vgpu/vgpu.h b/drivers/gpu/nvgpu/vgpu/vgpu.h
index f1590593..ffb863cd 100644
--- a/drivers/gpu/nvgpu/vgpu/vgpu.h
+++ b/drivers/gpu/nvgpu/vgpu/vgpu.h
@@ -29,6 +29,14 @@ u64 vgpu_bar1_map(struct gk20a *g, struct sg_table **sgt, u64 size);
 int vgpu_gr_isr(struct gk20a *g, struct tegra_vgpu_gr_intr_info *info);
 int vgpu_gr_nonstall_isr(struct gk20a *g,
                         struct tegra_vgpu_gr_nonstall_intr_info *info);
+int vgpu_gr_alloc_gr_ctx(struct gk20a *g,
+                        struct gr_ctx_desc **__gr_ctx,
+                        struct vm_gk20a *vm,
+                        u32 class,
+                        u32 flags);
+void vgpu_gr_free_gr_ctx(struct gk20a *g, struct vm_gk20a *vm,
+                        struct gr_ctx_desc *gr_ctx);
+int vgpu_gr_init_ctx_state(struct gk20a *g);
 int vgpu_fifo_isr(struct gk20a *g, struct tegra_vgpu_fifo_intr_info *info);
 int vgpu_fifo_nonstall_isr(struct gk20a *g,
                         struct tegra_vgpu_fifo_nonstall_intr_info *info);
@@ -77,6 +85,22 @@ static inline int vgpu_gr_isr(struct gk20a *g,
 {
         return 0;
 }
+static inline int vgpu_gr_alloc_gr_ctx(struct gk20a *g,
+                                struct gr_ctx_desc **__gr_ctx,
+                                struct vm_gk20a *vm,
+                                u32 class,
+                                u32 flags)
+{
+        return -ENOSYS;
+}
+static inline void vgpu_gr_free_gr_ctx(struct gk20a *g, struct vm_gk20a *vm,
+                                struct gr_ctx_desc *gr_ctx)
+{
+}
+static inline int vgpu_gr_init_ctx_state(struct gk20a *g)
+{
+        return -ENOSYS;
+}
 static inline int vgpu_fifo_isr(struct gk20a *g,
                         struct tegra_vgpu_fifo_intr_info *info)
 {