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authorDeepak Nibade <dnibade@nvidia.com>2017-11-14 09:43:28 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-11-17 11:27:19 -0500
commitb42fb7ba26b565f93118fbdd9e17b42ee6144c5e (patch)
tree26e2d919f019d15b51bba4d7b5c938f77ad5cff5 /drivers/gpu/nvgpu/vgpu/vgpu.h
parentb7cc3a2aa6c92a09eed43513287c9062f22ad127 (diff)
gpu: nvgpu: move vgpu code to linux
Most of VGPU code is linux specific but lies in common code So until VGPU code is properly abstracted and made os-independent, move all of VGPU code to linux specific directory Handle corresponding Makefile changes Update all #includes to reflect new paths Add GPL license to newly added linux files Jira NVGPU-387 Change-Id: Ic133e4c80e570bcc273f0dacf45283fefd678923 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1599472 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/vgpu.h')
-rw-r--r--drivers/gpu/nvgpu/vgpu/vgpu.h194
1 files changed, 0 insertions, 194 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/vgpu.h b/drivers/gpu/nvgpu/vgpu/vgpu.h
deleted file mode 100644
index dcfbddf2..00000000
--- a/drivers/gpu/nvgpu/vgpu/vgpu.h
+++ /dev/null
@@ -1,194 +0,0 @@
1/*
2 * Virtualized GPU Interfaces
3 *
4 * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
25#ifndef _VIRT_H_
26#define _VIRT_H_
27
28struct device;
29struct tegra_vgpu_gr_intr_info;
30struct tegra_vgpu_fifo_intr_info;
31struct tegra_vgpu_cmd_msg;
32struct gk20a_platform;
33
34#ifdef CONFIG_TEGRA_GR_VIRTUALIZATION
35#include <linux/tegra_gr_comm.h>
36#include <linux/tegra_vgpu.h>
37#include "gk20a/gk20a.h"
38#include "common/linux/platform_gk20a.h"
39#include "common/linux/os_linux.h"
40
41#include <nvgpu/thread.h>
42
43struct vgpu_priv_data {
44 u64 virt_handle;
45 struct nvgpu_thread intr_handler;
46 struct tegra_vgpu_constants_params constants;
47};
48
49static inline
50struct vgpu_priv_data *vgpu_get_priv_data_from_dev(struct device *dev)
51{
52 struct gk20a_platform *plat = gk20a_get_platform(dev);
53
54 return (struct vgpu_priv_data *)plat->vgpu_priv;
55}
56
57static inline struct vgpu_priv_data *vgpu_get_priv_data(struct gk20a *g)
58{
59 return vgpu_get_priv_data_from_dev(dev_from_gk20a(g));
60}
61
62static inline u64 vgpu_get_handle_from_dev(struct device *dev)
63{
64 struct vgpu_priv_data *priv = vgpu_get_priv_data_from_dev(dev);
65
66 if (unlikely(!priv)) {
67 dev_err(dev, "invalid vgpu_priv_data in %s\n", __func__);
68 return INT_MAX;
69 }
70
71 return priv->virt_handle;
72}
73
74static inline u64 vgpu_get_handle(struct gk20a *g)
75{
76 return vgpu_get_handle_from_dev(dev_from_gk20a(g));
77}
78
79int vgpu_pm_prepare_poweroff(struct device *dev);
80int vgpu_pm_finalize_poweron(struct device *dev);
81int vgpu_probe(struct platform_device *dev);
82int vgpu_remove(struct platform_device *dev);
83u64 vgpu_bar1_map(struct gk20a *g, struct sg_table **sgt, u64 size);
84int vgpu_gr_isr(struct gk20a *g, struct tegra_vgpu_gr_intr_info *info);
85int vgpu_gr_nonstall_isr(struct gk20a *g,
86 struct tegra_vgpu_gr_nonstall_intr_info *info);
87int vgpu_gr_alloc_gr_ctx(struct gk20a *g,
88 struct gr_ctx_desc **__gr_ctx,
89 struct vm_gk20a *vm,
90 u32 class,
91 u32 flags);
92void vgpu_gr_free_gr_ctx(struct gk20a *g, struct vm_gk20a *vm,
93 struct gr_ctx_desc *gr_ctx);
94void vgpu_gr_handle_sm_esr_event(struct gk20a *g,
95 struct tegra_vgpu_sm_esr_info *info);
96int vgpu_gr_init_ctx_state(struct gk20a *g);
97int vgpu_fifo_isr(struct gk20a *g, struct tegra_vgpu_fifo_intr_info *info);
98int vgpu_fifo_nonstall_isr(struct gk20a *g,
99 struct tegra_vgpu_fifo_nonstall_intr_info *info);
100int vgpu_ce2_nonstall_isr(struct gk20a *g,
101 struct tegra_vgpu_ce2_nonstall_intr_info *info);
102u32 vgpu_ce_get_num_pce(struct gk20a *g);
103int vgpu_init_mm_support(struct gk20a *g);
104int vgpu_init_gr_support(struct gk20a *g);
105int vgpu_init_fifo_support(struct gk20a *g);
106
107int vgpu_get_attribute(u64 handle, u32 attrib, u32 *value);
108int vgpu_comm_sendrecv(struct tegra_vgpu_cmd_msg *msg, size_t size_in,
109 size_t size_out);
110
111int vgpu_gm20b_init_hal(struct gk20a *g);
112int vgpu_gp10b_init_hal(struct gk20a *g);
113
114int vgpu_init_gpu_characteristics(struct gk20a *g);
115
116void vgpu_create_sysfs(struct device *dev);
117void vgpu_remove_sysfs(struct device *dev);
118int vgpu_read_ptimer(struct gk20a *g, u64 *value);
119int vgpu_get_timestamps_zipper(struct gk20a *g,
120 u32 source_id, u32 count,
121 struct nvgpu_cpu_time_correlation_sample *samples);
122#else
123static inline int vgpu_pm_prepare_poweroff(struct device *dev)
124{
125 return -ENOSYS;
126}
127static inline int vgpu_pm_finalize_poweron(struct device *dev)
128{
129 return -ENOSYS;
130}
131static inline int vgpu_probe(struct platform_device *dev)
132{
133 return -ENOSYS;
134}
135static inline int vgpu_remove(struct platform_device *dev)
136{
137 return -ENOSYS;
138}
139static inline u64 vgpu_bar1_map(struct gk20a *g, struct sg_table **sgt,
140 u64 size)
141{
142 return 0;
143}
144static inline int vgpu_gr_isr(struct gk20a *g,
145 struct tegra_vgpu_gr_intr_info *info)
146{
147 return 0;
148}
149static inline int vgpu_gr_alloc_gr_ctx(struct gk20a *g,
150 struct gr_ctx_desc **__gr_ctx,
151 struct vm_gk20a *vm,
152 u32 class,
153 u32 flags)
154{
155 return -ENOSYS;
156}
157static inline void vgpu_gr_free_gr_ctx(struct gk20a *g, struct vm_gk20a *vm,
158 struct gr_ctx_desc *gr_ctx)
159{
160}
161static inline int vgpu_gr_init_ctx_state(struct gk20a *g)
162{
163 return -ENOSYS;
164}
165static inline int vgpu_fifo_isr(struct gk20a *g,
166 struct tegra_vgpu_fifo_intr_info *info)
167{
168 return 0;
169}
170static inline int vgpu_init_mm_support(struct gk20a *g)
171{
172 return -ENOSYS;
173}
174static inline int vgpu_init_gr_support(struct gk20a *g)
175{
176 return -ENOSYS;
177}
178static inline int vgpu_init_fifo_support(struct gk20a *g)
179{
180 return -ENOSYS;
181}
182
183static inline int vgpu_get_attribute(u64 handle, u32 attrib, u32 *value)
184{
185 return -ENOSYS;
186}
187static inline int vgpu_comm_sendrecv(struct tegra_vgpu_cmd_msg *msg, size_t size_in,
188 size_t size_out)
189{
190 return -ENOSYS;
191}
192#endif
193
194#endif