summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/vgpu/vgpu.c
diff options
context:
space:
mode:
authorRichard Zhao <rizhao@nvidia.com>2016-12-28 17:44:59 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-01-06 18:02:24 -0500
commitecc3722aa1d7cd439035b0895781930871008a82 (patch)
treeccc82c5e701760c193ec2cc54546ac6f2f0fe66d /drivers/gpu/nvgpu/vgpu/vgpu.c
parent48ce94f940c9bae34282c40852047a7af7763ceb (diff)
gpu: nvgpu: vgpu: restructure event handling
Take interrupts as one kind of event message, and make it easier to add new kind of events. JIRA VFND-3291 Bug 200257899 Change-Id: I83482293230c0aa10b05caf61e249a042bf6653c Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1278396 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/vgpu.c')
-rw-r--r--drivers/gpu/nvgpu/vgpu/vgpu.c53
1 files changed, 28 insertions, 25 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/vgpu.c b/drivers/gpu/nvgpu/vgpu/vgpu.c
index 213f6bbb..da79de9d 100644
--- a/drivers/gpu/nvgpu/vgpu/vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/vgpu.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Virtualized GPU 2 * Virtualized GPU
3 * 3 *
4 * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License, 7 * under the terms and conditions of the GNU General Public License,
@@ -102,12 +102,12 @@ int vgpu_get_attribute(u64 handle, u32 attrib, u32 *value)
102 return 0; 102 return 0;
103} 103}
104 104
105static void vgpu_handle_general_event(struct gk20a *g, 105static void vgpu_handle_channel_event(struct gk20a *g,
106 struct tegra_vgpu_general_event_info *info) 106 struct tegra_vgpu_channel_event_info *info)
107{ 107{
108 if (info->id >= g->fifo.num_channels || 108 if (info->id >= g->fifo.num_channels ||
109 info->event_id >= NVGPU_IOCTL_CHANNEL_EVENT_ID_MAX) { 109 info->event_id >= NVGPU_IOCTL_CHANNEL_EVENT_ID_MAX) {
110 gk20a_err(g->dev, "invalid general event"); 110 gk20a_err(g->dev, "invalid channel event");
111 return; 111 return;
112 } 112 }
113 113
@@ -152,30 +152,33 @@ static int vgpu_intr_thread(void *dev_id)
152 break; 152 break;
153 } 153 }
154 154
155 if (msg->event == TEGRA_VGPU_EVENT_FECS_TRACE) { 155 switch (msg->event) {
156 case TEGRA_VGPU_EVENT_INTR:
157 if (msg->unit == TEGRA_VGPU_INTR_GR)
158 vgpu_gr_isr(g, &msg->info.gr_intr);
159 else if (msg->unit == TEGRA_VGPU_NONSTALL_INTR_GR)
160 vgpu_gr_nonstall_isr(g,
161 &msg->info.gr_nonstall_intr);
162 else if (msg->unit == TEGRA_VGPU_INTR_FIFO)
163 vgpu_fifo_isr(g, &msg->info.fifo_intr);
164 else if (msg->unit == TEGRA_VGPU_NONSTALL_INTR_FIFO)
165 vgpu_fifo_nonstall_isr(g,
166 &msg->info.fifo_nonstall_intr);
167 else if (msg->unit == TEGRA_VGPU_NONSTALL_INTR_CE2)
168 vgpu_ce2_nonstall_isr(g,
169 &msg->info.ce2_nonstall_intr);
170 break;
171 case TEGRA_VGPU_EVENT_FECS_TRACE:
156 vgpu_fecs_trace_data_update(g); 172 vgpu_fecs_trace_data_update(g);
157 tegra_gr_comm_release(handle); 173 break;
158 continue; 174 case TEGRA_VGPU_EVENT_CHANNEL:
159 } 175 vgpu_handle_channel_event(g, &msg->info.channel_event);
160 176 break;
161 if (msg->event == TEGRA_VGPU_EVENT_CHANNEL) { 177 default:
162 vgpu_handle_general_event(g, &msg->info.general_event); 178 gk20a_err(g->dev, "unknown event %u", msg->event);
163 tegra_gr_comm_release(handle); 179 break;
164 continue;
165 } 180 }
166 181
167 if (msg->unit == TEGRA_VGPU_INTR_GR)
168 vgpu_gr_isr(g, &msg->info.gr_intr);
169 else if (msg->unit == TEGRA_VGPU_NONSTALL_INTR_GR)
170 vgpu_gr_nonstall_isr(g, &msg->info.gr_nonstall_intr);
171 else if (msg->unit == TEGRA_VGPU_INTR_FIFO)
172 vgpu_fifo_isr(g, &msg->info.fifo_intr);
173 else if (msg->unit == TEGRA_VGPU_NONSTALL_INTR_FIFO)
174 vgpu_fifo_nonstall_isr(g,
175 &msg->info.fifo_nonstall_intr);
176 else if (msg->unit == TEGRA_VGPU_NONSTALL_INTR_CE2)
177 vgpu_ce2_nonstall_isr(g, &msg->info.ce2_nonstall_intr);
178
179 tegra_gr_comm_release(handle); 182 tegra_gr_comm_release(handle);
180 } 183 }
181 184