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authorTerje Bergstrom <tbergstrom@nvidia.com>2016-04-19 13:27:11 -0400
committerTerje Bergstrom <tbergstrom@nvidia.com>2016-04-26 12:46:04 -0400
commitec62c649b5338e7608ea82546135e88f443b90a8 (patch)
treef7190b7d86fafd9764a13a50689ef70bdff66300 /drivers/gpu/nvgpu/vgpu/vgpu.c
parentb10e02f53769c6b8dcc58db09ae1cec0cdca4417 (diff)
gpu: nvgpu: Idle GR before calling PMU ZBC save
On gk20a when PMU is updating ZBC colors it is reading them from L2. But L2 has one port, and ZBC reads can race with other transactions. Idle graphics before sending PMU the ZBC_UPDATE request. Also makes pmu_save_zbc a HAL, because PMU ucode has changes to bypass this problem on some chips. Bug 1746047 Change-Id: Id8fcd6850af7ef1d8f0a6aafa0fe6b4f88b5f2d9 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1129017
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/vgpu.c')
0 files changed, 0 insertions, 0 deletions