gpu: nvgpu: vgpu: add tsg set timeslice support

Bug 1702773
JIRA VFND-1496

Change-Id: Ice570df78d974fa59f2a932caf0e6249b13493a1
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1144929
(cherry picked from commit 8b6ec996f3773e497a040a8fe4148e01e8dc35fa)
Reviewed-on: http://git-master/r/1150705
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 22 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/vgpu/tsg_vgpu.c b/drivers/gpu/nvgpu/vgpu/tsg_vgpu.c
index 9245693d..820a3db3 100644
--- a/drivers/gpu/nvgpu/vgpu/tsg_vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/tsg_vgpu.c
@@ -78,8 +78,30 @@ static int vgpu_tsg_unbind_channel(struct channel_gk20a *ch)
         return err;
 }
 
+static int vgpu_tsg_set_timeslice(struct tsg_gk20a *tsg, u32 timeslice)
+{
+        struct gk20a_platform *platform = gk20a_get_platform(tsg->g->dev);
+        struct tegra_vgpu_cmd_msg msg = {0};
+        struct tegra_vgpu_tsg_timeslice_params *p =
+                                &msg.params.tsg_timeslice;
+        int err;
+
+        gk20a_dbg_fn("");
+
+        msg.cmd = TEGRA_VGPU_CMD_TSG_SET_TIMESLICE;
+        msg.handle = platform->virt_handle;
+        p->tsg_id = tsg->tsgid;
+        p->timeslice_us = timeslice;
+        err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
+        err = err ? err : msg.ret;
+        WARN_ON(err);
+
+        return err;
+}
+
 void vgpu_init_tsg_ops(struct gpu_ops *gops)
 {
         gops->fifo.tsg_bind_channel = vgpu_tsg_bind_channel;
         gops->fifo.tsg_unbind_channel = vgpu_tsg_unbind_channel;
+        gops->fifo.tsg_set_timeslice = vgpu_tsg_set_timeslice;
 }