gpu: nvgpu: vgpu: modify tsg enable sequence

TSG enable sequence in native has been modified due to a
hardware bug requiring enabling all channels with NEXT and
CTX_RELOAD set in a TSG, and then enabling rest of
channels.However it is not possible to check if NEXT and
CTX_RELOAD is set in vgpu. Have a separate implementation
for enabling tsg sequence in vgpu till the fix for
hardware bug is implemented for virtualized configuration.

Bug 200348087

Change-Id: I8e6c2ba8722531563de65e51e3d6af6acb7af213
Signed-off-by: Aparna Das <aparnad@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1588739
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nirav Patel <nipatel@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c
index dd4dfdae..e7996ce7 100644
--- a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c
+++ b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c
@@ -339,7 +339,7 @@ static const struct gpu_ops vgpu_gv11b_ops = {
                 .pbdma_acquire_val = gk20a_fifo_pbdma_acquire_val,
                 .preempt_channel = vgpu_fifo_preempt_channel,
                 .preempt_tsg = vgpu_fifo_preempt_tsg,
-                .enable_tsg = gk20a_enable_tsg,
+                .enable_tsg = vgpu_enable_tsg,
                 .disable_tsg = gk20a_disable_tsg,
                 .tsg_verify_channel_status = NULL,
                 .tsg_verify_status_ctx_reload = NULL,