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authorTerje Bergstrom <tbergstrom@nvidia.com>2018-08-09 12:20:33 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-08-14 18:33:20 -0400
commit91390d857f6302f9c2923ec4188ea7e24ee537a2 (patch)
treee0884e79ea748d2c0bd384c29f805125a7b88fec /drivers/gpu/nvgpu/vgpu/gv11b
parent02f9c99e4b4a452ded20978c5ee1e27b775b9224 (diff)
gpu: nvgpu: Move therm HAL to common
Move implementation of therm HAL to common/therm. ELCG and BLCG code was embedded in gr HAL, so moved that code to therm. Bump gk20a code to gm20b. JIRA NVGPU-955 Change-Id: I9b03e52f2832d3a1d89071a577e8ce106aaf603b Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1795989 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/gv11b')
-rw-r--r--drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c
index 995a2c2c..e2410e4e 100644
--- a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c
+++ b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c
@@ -29,6 +29,9 @@
29#include "common/fb/fb_gm20b.h" 29#include "common/fb/fb_gm20b.h"
30#include "common/fb/fb_gp10b.h" 30#include "common/fb/fb_gp10b.h"
31#include "common/fb/fb_gv11b.h" 31#include "common/fb/fb_gv11b.h"
32#include "common/therm/therm_gm20b.h"
33#include "common/therm/therm_gp10b.h"
34#include "common/therm/therm_gv11b.h"
32 35
33#include <gk20a/gk20a.h> 36#include <gk20a/gk20a.h>
34#include <gv11b/hal_gv11b.h> 37#include <gv11b/hal_gv11b.h>
@@ -63,7 +66,6 @@
63#include <gp10b/ce_gp10b.h> 66#include <gp10b/ce_gp10b.h>
64#include "gp10b/gr_gp10b.h" 67#include "gp10b/gr_gp10b.h"
65#include <gp10b/fifo_gp10b.h> 68#include <gp10b/fifo_gp10b.h>
66#include <gp10b/therm_gp10b.h>
67#include <gp10b/ltc_gp10b.h> 69#include <gp10b/ltc_gp10b.h>
68#include <gp10b/fuse_gp10b.h> 70#include <gp10b/fuse_gp10b.h>
69 71
@@ -76,7 +78,6 @@
76#include <gv11b/mc_gv11b.h> 78#include <gv11b/mc_gv11b.h>
77#include <gv11b/ce_gv11b.h> 79#include <gv11b/ce_gv11b.h>
78#include <gv11b/fifo_gv11b.h> 80#include <gv11b/fifo_gv11b.h>
79#include <gv11b/therm_gv11b.h>
80#include <gv11b/regops_gv11b.h> 81#include <gv11b/regops_gv11b.h>
81#include <gv11b/gr_ctx_gv11b.h> 82#include <gv11b/gr_ctx_gv11b.h>
82#include <gv11b/ltc_gv11b.h> 83#include <gv11b/ltc_gv11b.h>
@@ -200,7 +201,6 @@ static const struct gpu_ops vgpu_gv11b_ops = {
200 .commit_inst = vgpu_gr_gv11b_commit_inst, 201 .commit_inst = vgpu_gr_gv11b_commit_inst,
201 .write_zcull_ptr = gr_gv11b_write_zcull_ptr, 202 .write_zcull_ptr = gr_gv11b_write_zcull_ptr,
202 .write_pm_ptr = gr_gv11b_write_pm_ptr, 203 .write_pm_ptr = gr_gv11b_write_pm_ptr,
203 .init_elcg_mode = gr_gv11b_init_elcg_mode,
204 .load_tpc_mask = gr_gv11b_load_tpc_mask, 204 .load_tpc_mask = gr_gv11b_load_tpc_mask,
205 .inval_icache = gr_gk20a_inval_icache, 205 .inval_icache = gr_gk20a_inval_icache,
206 .trigger_suspend = gv11b_gr_sm_trigger_suspend, 206 .trigger_suspend = gv11b_gr_sm_trigger_suspend,
@@ -505,6 +505,8 @@ static const struct gpu_ops vgpu_gv11b_ops = {
505 }, 505 },
506 .therm = { 506 .therm = {
507 .init_therm_setup_hw = gp10b_init_therm_setup_hw, 507 .init_therm_setup_hw = gp10b_init_therm_setup_hw,
508 .init_elcg_mode = gv11b_therm_init_elcg_mode,
509 .init_blcg_mode = gm20b_therm_init_blcg_mode,
508 .elcg_init_idle_filters = gv11b_elcg_init_idle_filters, 510 .elcg_init_idle_filters = gv11b_elcg_init_idle_filters,
509 }, 511 },
510 .pmu = { 512 .pmu = {