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authorDeepak Nibade <dnibade@nvidia.com>2017-11-14 09:43:28 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-11-17 11:27:19 -0500
commitb42fb7ba26b565f93118fbdd9e17b42ee6144c5e (patch)
tree26e2d919f019d15b51bba4d7b5c938f77ad5cff5 /drivers/gpu/nvgpu/vgpu/gr_vgpu.h
parentb7cc3a2aa6c92a09eed43513287c9062f22ad127 (diff)
gpu: nvgpu: move vgpu code to linux
Most of VGPU code is linux specific but lies in common code So until VGPU code is properly abstracted and made os-independent, move all of VGPU code to linux specific directory Handle corresponding Makefile changes Update all #includes to reflect new paths Add GPL license to newly added linux files Jira NVGPU-387 Change-Id: Ic133e4c80e570bcc273f0dacf45283fefd678923 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1599472 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/gr_vgpu.h')
-rw-r--r--drivers/gpu/nvgpu/vgpu/gr_vgpu.h70
1 files changed, 0 insertions, 70 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/gr_vgpu.h b/drivers/gpu/nvgpu/vgpu/gr_vgpu.h
deleted file mode 100644
index b43e334a..00000000
--- a/drivers/gpu/nvgpu/vgpu/gr_vgpu.h
+++ /dev/null
@@ -1,70 +0,0 @@
1/*
2 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef _GR_VGPU_H_
24#define _GR_VGPU_H_
25
26#include <nvgpu/types.h>
27
28struct gk20a;
29struct channel_gk20a;
30struct gr_gk20a;
31struct gr_zcull_info;
32struct zbc_entry;
33struct zbc_query_params;
34struct dbg_session_gk20a;
35
36void vgpu_gr_detect_sm_arch(struct gk20a *g);
37void vgpu_gr_free_channel_ctx(struct channel_gk20a *c, bool is_tsg);
38int vgpu_gr_alloc_obj_ctx(struct channel_gk20a *c, u32 class_num, u32 flags);
39int vgpu_gr_bind_ctxsw_zcull(struct gk20a *g, struct gr_gk20a *gr,
40 struct channel_gk20a *c, u64 zcull_va,
41 u32 mode);
42int vgpu_gr_get_zcull_info(struct gk20a *g, struct gr_gk20a *gr,
43 struct gr_zcull_info *zcull_params);
44u32 vgpu_gr_get_gpc_tpc_mask(struct gk20a *g, u32 gpc_index);
45u32 vgpu_gr_get_max_fbps_count(struct gk20a *g);
46u32 vgpu_gr_get_fbp_en_mask(struct gk20a *g);
47u32 vgpu_gr_get_max_ltc_per_fbp(struct gk20a *g);
48u32 vgpu_gr_get_max_lts_per_ltc(struct gk20a *g);
49u32 *vgpu_gr_rop_l2_en_mask(struct gk20a *g);
50int vgpu_gr_add_zbc(struct gk20a *g, struct gr_gk20a *gr,
51 struct zbc_entry *zbc_val);
52int vgpu_gr_query_zbc(struct gk20a *g, struct gr_gk20a *gr,
53 struct zbc_query_params *query_params);
54int vgpu_gr_set_sm_debug_mode(struct gk20a *g,
55 struct channel_gk20a *ch, u64 sms, bool enable);
56int vgpu_gr_update_smpc_ctxsw_mode(struct gk20a *g,
57 struct channel_gk20a *ch, bool enable);
58int vgpu_gr_update_hwpm_ctxsw_mode(struct gk20a *g,
59 struct channel_gk20a *ch, bool enable);
60int vgpu_gr_clear_sm_error_state(struct gk20a *g,
61 struct channel_gk20a *ch, u32 sm_id);
62int vgpu_gr_suspend_contexts(struct gk20a *g,
63 struct dbg_session_gk20a *dbg_s,
64 int *ctx_resident_ch_fd);
65int vgpu_gr_resume_contexts(struct gk20a *g,
66 struct dbg_session_gk20a *dbg_s,
67 int *ctx_resident_ch_fd);
68int vgpu_gr_commit_inst(struct channel_gk20a *c, u64 gpu_va);
69
70#endif