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author | Aparna Das <aparnad@nvidia.com> | 2018-02-16 20:50:05 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-03-16 10:34:12 -0400 |
commit | ae1b86ed4f9bb706a289848829a7909669a538d3 (patch) | |
tree | 0c8a0a776500782b08af420b1a2b862787853c72 /drivers/gpu/nvgpu/vgpu/gr_vgpu.h | |
parent | 34323b559590ed8f1c64ecbb7ffbd838a6478594 (diff) |
gpu: nvgpu: add gpu_va to update_hwpm_ctxsw_mode parameters()
It'll allow the function to use fixed mapping.
Jira VQRM-2982
Change-Id: I98159c5b199ce1854b1b40704392237cadb71ef2
Signed-off-by: Aparna Das <aparnad@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1660225
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-by: Nirav Patel <nipatel@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/gr_vgpu.h')
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/gr_vgpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/gr_vgpu.h b/drivers/gpu/nvgpu/vgpu/gr_vgpu.h index 1f55823c..d6b25b97 100644 --- a/drivers/gpu/nvgpu/vgpu/gr_vgpu.h +++ b/drivers/gpu/nvgpu/vgpu/gr_vgpu.h | |||
@@ -58,7 +58,7 @@ int vgpu_gr_set_sm_debug_mode(struct gk20a *g, | |||
58 | int vgpu_gr_update_smpc_ctxsw_mode(struct gk20a *g, | 58 | int vgpu_gr_update_smpc_ctxsw_mode(struct gk20a *g, |
59 | struct channel_gk20a *ch, bool enable); | 59 | struct channel_gk20a *ch, bool enable); |
60 | int vgpu_gr_update_hwpm_ctxsw_mode(struct gk20a *g, | 60 | int vgpu_gr_update_hwpm_ctxsw_mode(struct gk20a *g, |
61 | struct channel_gk20a *ch, bool enable); | 61 | struct channel_gk20a *ch, u64 gpu_va, bool enable); |
62 | int vgpu_gr_clear_sm_error_state(struct gk20a *g, | 62 | int vgpu_gr_clear_sm_error_state(struct gk20a *g, |
63 | struct channel_gk20a *ch, u32 sm_id); | 63 | struct channel_gk20a *ch, u32 sm_id); |
64 | int vgpu_gr_suspend_contexts(struct gk20a *g, | 64 | int vgpu_gr_suspend_contexts(struct gk20a *g, |