diff options
author | Richard Zhao <rizhao@nvidia.com> | 2016-03-31 14:16:23 -0400 |
---|---|---|
committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-05-31 13:47:22 -0400 |
commit | d707c5a444e024e1184213a75f44a73dbb1707d2 (patch) | |
tree | 09711370df9d9078e4f604e60983877bbf30b9de /drivers/gpu/nvgpu/vgpu/gr_vgpu.c | |
parent | a71ce831fbbca3ba8602e0b07ecd630c4a39f376 (diff) |
gpu: nvgpu: add tsg support for vgpu
- make tsg_gk20a.c call HAL for enable/disable channels
- add preempt_tsg HAL callbacks
- add tsg bind/unbind channel HAL callbacks
- add according tsg callbacks for vgpu
Bug 1702773
JIRA VFND-1003
Change-Id: I2cba74b3ebd3920ef09219a168e6433d9574dbe8
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1144932
(cherry picked from commit c3787de7d38651d46969348f5acae2ba86b31ec7)
Reviewed-on: http://git-master/r/1126942
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/gr_vgpu.c')
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/gr_vgpu.c | 82 |
1 files changed, 64 insertions, 18 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c index b9490ac9..f395ac1e 100644 --- a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c | |||
@@ -445,6 +445,26 @@ static int vgpu_gr_ch_bind_gr_ctx(struct channel_gk20a *c) | |||
445 | return err; | 445 | return err; |
446 | } | 446 | } |
447 | 447 | ||
448 | static int vgpu_gr_tsg_bind_gr_ctx(struct tsg_gk20a *tsg) | ||
449 | { | ||
450 | struct gk20a_platform *platform = gk20a_get_platform(tsg->g->dev); | ||
451 | struct gr_ctx_desc *gr_ctx = tsg->tsg_gr_ctx; | ||
452 | struct tegra_vgpu_cmd_msg msg = {0}; | ||
453 | struct tegra_vgpu_tsg_bind_gr_ctx_params *p = | ||
454 | &msg.params.tsg_bind_gr_ctx; | ||
455 | int err; | ||
456 | |||
457 | msg.cmd = TEGRA_VGPU_CMD_TSG_BIND_GR_CTX; | ||
458 | msg.handle = platform->virt_handle; | ||
459 | p->tsg_id = tsg->tsgid; | ||
460 | p->gr_ctx_handle = gr_ctx->virt_ctx; | ||
461 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
462 | err = err ? err : msg.ret; | ||
463 | WARN_ON(err); | ||
464 | |||
465 | return err; | ||
466 | } | ||
467 | |||
448 | static int vgpu_gr_alloc_obj_ctx(struct channel_gk20a *c, | 468 | static int vgpu_gr_alloc_obj_ctx(struct channel_gk20a *c, |
449 | struct nvgpu_alloc_obj_ctx_args *args) | 469 | struct nvgpu_alloc_obj_ctx_args *args) |
450 | { | 470 | { |
@@ -472,32 +492,58 @@ static int vgpu_gr_alloc_obj_ctx(struct channel_gk20a *c, | |||
472 | } | 492 | } |
473 | c->obj_class = args->class_num; | 493 | c->obj_class = args->class_num; |
474 | 494 | ||
475 | /* FIXME: add TSG support */ | ||
476 | if (gk20a_is_channel_marked_as_tsg(c)) | 495 | if (gk20a_is_channel_marked_as_tsg(c)) |
477 | tsg = &f->tsg[c->tsgid]; | 496 | tsg = &f->tsg[c->tsgid]; |
478 | 497 | ||
479 | /* allocate gr ctx buffer */ | 498 | if (!tsg) { |
480 | if (!ch_ctx->gr_ctx) { | 499 | /* allocate gr ctx buffer */ |
481 | err = g->ops.gr.alloc_gr_ctx(g, &c->ch_ctx.gr_ctx, | 500 | if (!ch_ctx->gr_ctx) { |
482 | c->vm, | 501 | err = g->ops.gr.alloc_gr_ctx(g, &c->ch_ctx.gr_ctx, |
483 | args->class_num, | 502 | c->vm, |
484 | args->flags); | 503 | args->class_num, |
485 | if (!err) | 504 | args->flags); |
486 | err = vgpu_gr_ch_bind_gr_ctx(c); | 505 | if (!err) |
506 | err = vgpu_gr_ch_bind_gr_ctx(c); | ||
507 | if (err) { | ||
508 | gk20a_err(dev_from_gk20a(g), | ||
509 | "fail to allocate gr ctx buffer"); | ||
510 | goto out; | ||
511 | } | ||
512 | } else { | ||
513 | /*TBD: needs to be more subtle about which is | ||
514 | * being allocated as some are allowed to be | ||
515 | * allocated along same channel */ | ||
516 | gk20a_err(dev_from_gk20a(g), | ||
517 | "too many classes alloc'd on same channel"); | ||
518 | err = -EINVAL; | ||
519 | goto out; | ||
520 | } | ||
521 | } else { | ||
522 | if (!tsg->tsg_gr_ctx) { | ||
523 | tsg->vm = c->vm; | ||
524 | gk20a_vm_get(tsg->vm); | ||
525 | err = g->ops.gr.alloc_gr_ctx(g, &tsg->tsg_gr_ctx, | ||
526 | c->vm, | ||
527 | args->class_num, | ||
528 | args->flags); | ||
529 | if (!err) | ||
530 | err = vgpu_gr_tsg_bind_gr_ctx(tsg); | ||
531 | if (err) { | ||
532 | gk20a_err(dev_from_gk20a(g), | ||
533 | "fail to allocate TSG gr ctx buffer, err=%d", err); | ||
534 | gk20a_vm_put(tsg->vm); | ||
535 | tsg->vm = NULL; | ||
536 | goto out; | ||
537 | } | ||
538 | } | ||
487 | 539 | ||
540 | ch_ctx->gr_ctx = tsg->tsg_gr_ctx; | ||
541 | err = vgpu_gr_ch_bind_gr_ctx(c); | ||
488 | if (err) { | 542 | if (err) { |
489 | gk20a_err(dev_from_gk20a(g), | 543 | gk20a_err(dev_from_gk20a(g), |
490 | "fail to allocate gr ctx buffer"); | 544 | "fail to bind gr ctx buffer"); |
491 | goto out; | 545 | goto out; |
492 | } | 546 | } |
493 | } else { | ||
494 | /*TBD: needs to be more subtle about which is | ||
495 | * being allocated as some are allowed to be | ||
496 | * allocated along same channel */ | ||
497 | gk20a_err(dev_from_gk20a(g), | ||
498 | "too many classes alloc'd on same channel"); | ||
499 | err = -EINVAL; | ||
500 | goto out; | ||
501 | } | 547 | } |
502 | 548 | ||
503 | /* commit gr ctx buffer */ | 549 | /* commit gr ctx buffer */ |