gpu: nvgpu: Split VM interface out

This patch begins the major rework of the GPU's virtual memory manager
(VMM). The VMM is the piece of code that handles the userspace interface
to buffers and their mappings into the GMMU. The core data structure is
the VM - for now still known as 'struct vm_gk20a'. Each one of these
structs represents one addres space to which channels or TSGs may bind
themselves to.

The VMM splits the interface up into two broad categories. First there's
the common, OS independent interfaces; and second there's the OS specific
interfaces.

OS independent
--------------

  This is the code that manages the lifetime of VMs, the buffers inside
  VMs (search, batch mapping) creation, destruction, etc.

OS Specific
-----------

  This handles mapping of buffers represented as they are represented by
  the OS (dma_buf's for example on Linux).

This patch is by no means complete. There's still Linux specific functions
scattered in ostensibly OS independent code. This is the first step. A
patch that rewrites everything in one go would simply be too big to
effectively review.

Instead the goal of this change is to simply separate out the basic
OS specific and OS agnostic interfaces into their own header files. The
next series of patches will start to pull the relevant implementations
into OS specific C files and common C files.

JIRA NVGPU-12
JIRA NVGPU-30

Change-Id: I242c7206047b6c769296226d855b7e44d5c4bfa8
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1464939
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 2 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
index c7960c1f..dd515f41 100644
--- a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
@@ -526,7 +526,7 @@ static int vgpu_gr_alloc_obj_ctx(struct channel_gk20a  *c,
         } else {
                 if (!tsg->tsg_gr_ctx) {
                         tsg->vm = c->vm;
-                        gk20a_vm_get(tsg->vm);
+                        nvgpu_vm_get(tsg->vm);
                         err = g->ops.gr.alloc_gr_ctx(g, &tsg->tsg_gr_ctx,
                                                 c->vm,
                                                 args->class_num,
@@ -536,7 +536,7 @@ static int vgpu_gr_alloc_obj_ctx(struct channel_gk20a  *c,
                         if (err) {
                                 nvgpu_err(g,
                                         "fail to allocate TSG gr ctx buffer, err=%d", err);
-                                gk20a_vm_put(tsg->vm);
+                                nvgpu_vm_put(tsg->vm);
                                 tsg->vm = NULL;
                                 goto out;
                         }