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authorPeter Daifuku <pdaifuku@nvidia.com>2016-03-31 17:57:20 -0400
committerTerje Bergstrom <tbergstrom@nvidia.com>2016-05-20 16:38:13 -0400
commita21e56d584641202327f64741b06b1cd9633d0f6 (patch)
treee52766b071ec539f95b0fb5da459a8d015a830d1 /drivers/gpu/nvgpu/vgpu/gr_vgpu.c
parentce0fe5082ebb8a7e0ca5a8992e17ae4547d4db5e (diff)
gpu: nvgpu: vgpu: add support for VSM ioctls
Add virtualized support for NUM_VSMS and VSMS_MAPPING ioctls. This requires adding an attribute request for the RM server, GPC0_TPC_COUNT JIRASW EVLR-253 Change-Id: Icaab4fadbbc9eab5d00cf78132928686944162df Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-on: http://git-master/r/1130615 (cherry picked from commit 78514079382b0de48457db340e3479e99a012040) Reviewed-on: http://git-master/r/1133865 (cherry picked from commit 27a8e645e2787a43d0073f0be6e8f64c0f183228) Reviewed-on: http://git-master/r/1122553 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/gr_vgpu.c')
-rw-r--r--drivers/gpu/nvgpu/vgpu/gr_vgpu.c48
1 files changed, 44 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
index 16d51ad3..420c714e 100644
--- a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
@@ -567,6 +567,19 @@ static int vgpu_gr_free_obj_ctx(struct channel_gk20a *c,
567 return 0; 567 return 0;
568} 568}
569 569
570static u32 vgpu_gr_get_gpc_tpc_count(struct gk20a *g, u32 gpc_index)
571{
572 struct gk20a_platform *platform = gk20a_get_platform(g->dev);
573 u32 data;
574
575 WARN_ON(gpc_index > 0);
576
577 if (vgpu_get_attribute(platform->virt_handle,
578 TEGRA_VGPU_ATTRIB_GPC0_TPC_COUNT, &data))
579 gk20a_err(dev_from_gk20a(g), "failed to retrieve gpc0_tpc_count");
580 return data;
581}
582
570static int vgpu_gr_init_gr_config(struct gk20a *g, struct gr_gk20a *gr) 583static int vgpu_gr_init_gr_config(struct gk20a *g, struct gr_gk20a *gr)
571{ 584{
572 struct gk20a_platform *platform = gk20a_get_platform(g->dev); 585 struct gk20a_platform *platform = gk20a_get_platform(g->dev);
@@ -593,13 +606,23 @@ static int vgpu_gr_init_gr_config(struct gk20a *g, struct gr_gk20a *gr)
593 &gr->tpc_count)) 606 &gr->tpc_count))
594 return -ENOMEM; 607 return -ENOMEM;
595 608
609 gr->gpc_tpc_count = kzalloc(gr->gpc_count * sizeof(u32), GFP_KERNEL);
610 if (!gr->gpc_tpc_count)
611 goto cleanup;
612
596 gr->gpc_tpc_mask = kzalloc(gr->gpc_count * sizeof(u32), GFP_KERNEL); 613 gr->gpc_tpc_mask = kzalloc(gr->gpc_count * sizeof(u32), GFP_KERNEL);
597 if (!gr->gpc_tpc_mask) { 614 if (!gr->gpc_tpc_mask)
598 gk20a_err(dev_from_gk20a(g), "%s: out of memory\n", __func__); 615 goto cleanup;
599 return -ENOMEM; 616
600 } 617 gr->sm_to_cluster = kzalloc(gr->gpc_count * gr->max_tpc_per_gpc_count *
618 sizeof(struct sm_info), GFP_KERNEL);
619 if (!gr->sm_to_cluster)
620 goto cleanup;
601 621
602 for (gpc_index = 0; gpc_index < gr->gpc_count; gpc_index++) { 622 for (gpc_index = 0; gpc_index < gr->gpc_count; gpc_index++) {
623 gr->gpc_tpc_count[gpc_index] =
624 vgpu_gr_get_gpc_tpc_count(g, gpc_index);
625
603 if (g->ops.gr.get_gpc_tpc_mask) 626 if (g->ops.gr.get_gpc_tpc_mask)
604 gr->gpc_tpc_mask[gpc_index] = 627 gr->gpc_tpc_mask[gpc_index] =
605 g->ops.gr.get_gpc_tpc_mask(g, gpc_index); 628 g->ops.gr.get_gpc_tpc_mask(g, gpc_index);
@@ -608,7 +631,18 @@ static int vgpu_gr_init_gr_config(struct gk20a *g, struct gr_gk20a *gr)
608 g->ops.gr.bundle_cb_defaults(g); 631 g->ops.gr.bundle_cb_defaults(g);
609 g->ops.gr.cb_size_default(g); 632 g->ops.gr.cb_size_default(g);
610 g->ops.gr.calc_global_ctx_buffer_size(g); 633 g->ops.gr.calc_global_ctx_buffer_size(g);
634 g->ops.gr.init_fs_state(g);
611 return 0; 635 return 0;
636cleanup:
637 gk20a_err(dev_from_gk20a(g), "%s: out of memory\n", __func__);
638
639 kfree(gr->gpc_tpc_count);
640 gr->gpc_tpc_count = NULL;
641
642 kfree(gr->gpc_tpc_mask);
643 gr->gpc_tpc_mask = NULL;
644
645 return -ENOMEM;
612} 646}
613 647
614static int vgpu_gr_bind_ctxsw_zcull(struct gk20a *g, struct gr_gk20a *gr, 648static int vgpu_gr_bind_ctxsw_zcull(struct gk20a *g, struct gr_gk20a *gr,
@@ -823,6 +857,12 @@ static void vgpu_remove_gr_support(struct gr_gk20a *gr)
823 857
824 kfree(gr->gpc_tpc_mask); 858 kfree(gr->gpc_tpc_mask);
825 gr->gpc_tpc_mask = NULL; 859 gr->gpc_tpc_mask = NULL;
860
861 kfree(gr->sm_to_cluster);
862 gr->sm_to_cluster = NULL;
863
864 kfree(gr->gpc_tpc_count);
865 gr->gpc_tpc_count = NULL;
826} 866}
827 867
828static int vgpu_gr_init_gr_setup_sw(struct gk20a *g) 868static int vgpu_gr_init_gr_setup_sw(struct gk20a *g)