gpu: nvgpu: add gops.fifo.set_error_notifier

RM Server overrides it for handling stall interrupts.

Jira VQRM-3058

Change-Id: I8b14f073e952d19c808cb693958626b8d8aee8ca
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1679709
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 6 insertions, 6 deletions

diff --git a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
index 1c72ca76..a6cb3828 100644
--- a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
@@ -926,30 +926,30 @@ int vgpu_gr_isr(struct gk20a *g, struct tegra_vgpu_gr_intr_info *info)
                 nvgpu_cond_broadcast_interruptible(&ch->semaphore_wq);
                 break;
         case TEGRA_VGPU_GR_INTR_SEMAPHORE_TIMEOUT:
-                nvgpu_set_error_notifier(ch,
+                g->ops.fifo.set_error_notifier(ch,
                                 NVGPU_ERR_NOTIFIER_GR_SEMAPHORE_TIMEOUT);
                 break;
         case TEGRA_VGPU_GR_INTR_ILLEGAL_NOTIFY:
-                nvgpu_set_error_notifier(ch,
+                g->ops.fifo.set_error_notifier(ch,
                                         NVGPU_ERR_NOTIFIER_GR_ILLEGAL_NOTIFY);
         case TEGRA_VGPU_GR_INTR_ILLEGAL_METHOD:
                 break;
         case TEGRA_VGPU_GR_INTR_ILLEGAL_CLASS:
-                nvgpu_set_error_notifier(ch,
+                g->ops.fifo.set_error_notifier(ch,
                                         NVGPU_ERR_NOTIFIER_GR_ERROR_SW_NOTIFY);
                 break;
         case TEGRA_VGPU_GR_INTR_FECS_ERROR:
                 break;
         case TEGRA_VGPU_GR_INTR_CLASS_ERROR:
-                nvgpu_set_error_notifier(ch,
+                g->ops.fifo.set_error_notifier(ch,
                                         NVGPU_ERR_NOTIFIER_GR_ERROR_SW_NOTIFY);
                 break;
         case TEGRA_VGPU_GR_INTR_FIRMWARE_METHOD:
-                nvgpu_set_error_notifier(ch,
+                g->ops.fifo.set_error_notifier(ch,
                                 NVGPU_ERR_NOTIFIER_GR_ERROR_SW_NOTIFY);
                 break;
         case TEGRA_VGPU_GR_INTR_EXCEPTION:
-                nvgpu_set_error_notifier(ch,
+                g->ops.fifo.set_error_notifier(ch,
                                 NVGPU_ERR_NOTIFIER_GR_ERROR_SW_NOTIFY);
                 break;
         case TEGRA_VGPU_GR_INTR_SM_EXCEPTION: