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author | Richard Zhao <rizhao@nvidia.com> | 2016-07-25 18:12:08 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2016-08-15 14:41:23 -0400 |
commit | 843bbc726c7283666a18d9ff899350e0cef18330 (patch) | |
tree | 5811b36c7aa7ec7e2b24dcae83e08cb513d27e13 /drivers/gpu/nvgpu/vgpu/gr_vgpu.c | |
parent | 233862859a759b14353d743c0bce7d0df18e49ca (diff) |
gpu: nvgpu: vgpu: add getting sm version constants
move below attributes to constants:
TEGRA_VGPU_ATTRIB_GPC0_TPC0_SM_ARCH
JIRA VFND-2103
Change-Id: I5d6aa8f4a49e65307989ef02d223c3ee31fcdeed
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1190481
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/gr_vgpu.c')
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/gr_vgpu.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c index bb52347f..a2af0162 100644 --- a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c | |||
@@ -17,6 +17,20 @@ | |||
17 | #include "gk20a/hw_gr_gk20a.h" | 17 | #include "gk20a/hw_gr_gk20a.h" |
18 | #include "gk20a/dbg_gpu_gk20a.h" | 18 | #include "gk20a/dbg_gpu_gk20a.h" |
19 | 19 | ||
20 | static void vgpu_gr_detect_sm_arch(struct gk20a *g) | ||
21 | { | ||
22 | struct vgpu_priv_data *priv = vgpu_get_priv_data(g); | ||
23 | |||
24 | gk20a_dbg_fn(""); | ||
25 | |||
26 | g->gpu_characteristics.sm_arch_sm_version = | ||
27 | priv->constants.sm_arch_sm_version; | ||
28 | g->gpu_characteristics.sm_arch_spa_version = | ||
29 | priv->constants.sm_arch_spa_version; | ||
30 | g->gpu_characteristics.sm_arch_warp_count = | ||
31 | priv->constants.sm_arch_warp_count; | ||
32 | } | ||
33 | |||
20 | static int vgpu_gr_commit_inst(struct channel_gk20a *c, u64 gpu_va) | 34 | static int vgpu_gr_commit_inst(struct channel_gk20a *c, u64 gpu_va) |
21 | { | 35 | { |
22 | struct tegra_vgpu_cmd_msg msg; | 36 | struct tegra_vgpu_cmd_msg msg; |
@@ -1095,6 +1109,7 @@ static int vgpu_gr_update_hwpm_ctxsw_mode(struct gk20a *g, | |||
1095 | 1109 | ||
1096 | void vgpu_init_gr_ops(struct gpu_ops *gops) | 1110 | void vgpu_init_gr_ops(struct gpu_ops *gops) |
1097 | { | 1111 | { |
1112 | gops->gr.detect_sm_arch = vgpu_gr_detect_sm_arch; | ||
1098 | gops->gr.free_channel_ctx = vgpu_gr_free_channel_ctx; | 1113 | gops->gr.free_channel_ctx = vgpu_gr_free_channel_ctx; |
1099 | gops->gr.alloc_obj_ctx = vgpu_gr_alloc_obj_ctx; | 1114 | gops->gr.alloc_obj_ctx = vgpu_gr_alloc_obj_ctx; |
1100 | gops->gr.free_obj_ctx = vgpu_gr_free_obj_ctx; | 1115 | gops->gr.free_obj_ctx = vgpu_gr_free_obj_ctx; |