gpu: nvgpu: vgpu: support additional notifications

Client notification support is now added for the following:
- stalling and non-stalling GR sema release
- non-stalling FIFO channel intr
- non-stalling CE2 nonblockpipe intr

Bug 200097077

Change-Id: Icd3c076d7880e1c9ef1fcc0fc58eed9f23f39277
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/736064
(cherry picked from commit 0585d1f14d5a5ae1ccde8ccb7b7daa5593b3d1bc)
Reviewed-on: http://git-master/r/759824
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 23 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
index f6f12c7b..99754cae 100644
--- a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
@@ -803,7 +803,8 @@ int vgpu_gr_isr(struct gk20a *g, struct tegra_vgpu_gr_intr_info *info)
         struct channel_gk20a *ch = &f->channel[info->chid];
 
         gk20a_dbg_fn("");
-        if (info->type != TEGRA_VGPU_GR_INTR_NOTIFY)
+        if (info->type != TEGRA_VGPU_GR_INTR_NOTIFY &&
+                info->type != TEGRA_VGPU_GR_INTR_SEMAPHORE)
                 gk20a_err(dev_from_gk20a(g), "gr intr (%d) on ch %u",
                         info->type, info->chid);
 
@@ -811,6 +812,10 @@ int vgpu_gr_isr(struct gk20a *g, struct tegra_vgpu_gr_intr_info *info)
         case TEGRA_VGPU_GR_INTR_NOTIFY:
                 wake_up(&ch->notifier_wq);
                 break;
+        case TEGRA_VGPU_GR_INTR_SEMAPHORE:
+                gk20a_channel_event(ch);
+                wake_up(&ch->semaphore_wq);
+                break;
         case TEGRA_VGPU_GR_INTR_SEMAPHORE_TIMEOUT:
                 gk20a_set_error_notifier(ch,
                                 NVGPU_CHANNEL_GR_SEMAPHORE_TIMEOUT);
@@ -846,6 +851,23 @@ int vgpu_gr_isr(struct gk20a *g, struct tegra_vgpu_gr_intr_info *info)
         return 0;
 }
 
+int vgpu_gr_nonstall_isr(struct gk20a *g,
+                        struct tegra_vgpu_gr_nonstall_intr_info *info)
+{
+        gk20a_dbg_fn("");
+
+        switch (info->type) {
+        case TEGRA_VGPU_GR_NONSTALL_INTR_SEMAPHORE:
+                gk20a_channel_semaphore_wakeup(g);
+                break;
+        default:
+                WARN_ON(1);
+                break;
+        }
+
+        return 0;
+}
+
 void vgpu_init_gr_ops(struct gpu_ops *gops)
 {
         gops->gr.free_channel_ctx = vgpu_gr_free_channel_ctx;