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authorAparna Das <aparnad@nvidia.com>2020-01-31 15:34:07 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2020-02-05 06:25:01 -0500
commit63e9d8eb9ad80724f2567aaa7c05cb2c7acfd4b1 (patch)
treea66df8619d3faa42f1f8d106a401fc34824953ad /drivers/gpu/nvgpu/vgpu/gr_vgpu.c
parente41fd090315ff37fa09314a8cfde6d384385e17a (diff)
gpu: nvgpu: vgpu: add mmu_debug_mode support
Added two new IVC commands that set gr and fb mmu debug mode. Bug 2586624 Change-Id: I358fb04713a9754fb209c0a90d02130dd4a1caf6 Reviewed-on: https://git-master.nvidia.com/r/2204980 (cherry picked from commit db4e5b09891aff075dfffb7cc2fe0630a71ab9a6) Signed-off-by: Aparna Das <aparnad@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2288347 Reviewed-by: Kajetan Dutka <kdutka@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: Kajetan Dutka <kdutka@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/gr_vgpu.c')
-rw-r--r--drivers/gpu/nvgpu/vgpu/gr_vgpu.c20
1 files changed, 19 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
index e3b1888e..cb4a441a 100644
--- a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Virtualized GPU Graphics 2 * Virtualized GPU Graphics
3 * 3 *
4 * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved.
5 * 5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a 6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"), 7 * copy of this software and associated documentation files (the "Software"),
@@ -1378,3 +1378,21 @@ int vgpu_gr_update_pc_sampling(struct channel_gk20a *ch, bool enable)
1378 1378
1379 return err ? err : msg.ret; 1379 return err ? err : msg.ret;
1380} 1380}
1381
1382int vgpu_gr_set_mmu_debug_mode(struct gk20a *g,
1383 struct channel_gk20a *ch, bool enable)
1384{
1385 struct tegra_vgpu_cmd_msg msg = {};
1386 struct tegra_vgpu_gr_set_mmu_debug_mode_params *p =
1387 &msg.params.gr_set_mmu_debug_mode;
1388 int err;
1389
1390 msg.cmd = TEGRA_VGPU_CMD_GR_SET_MMU_DEBUG_MODE;
1391 msg.handle = vgpu_get_handle(g);
1392 p->ch_handle = ch->virt_ctx;
1393 p->enable = enable ? 1U : 0U;
1394 err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
1395 WARN_ON(err || msg.ret);
1396
1397 return err ? err : msg.ret;
1398}