diff options
author | Richard Zhao <rizhao@nvidia.com> | 2017-04-10 18:29:36 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-06-30 01:34:36 -0400 |
commit | 28093a374bef54b9b68fcb2f00ae7d0529e33a3f (patch) | |
tree | 208c7080f683a0231d5e3ebdf15b2740872e80ce /drivers/gpu/nvgpu/vgpu/gr_vgpu.c | |
parent | ac292605b5d2c4c27c7d133601594b9692a32fed (diff) |
gpu: nvgpu: vgpu: add t19x support
- add commit_inst hal ops
- add t19x cmds to cmd big union
- add t19x vgpu driver and call t19x hal init
- get guest channel_base to calculate hw channel id
Jira VFND-3796
Change-Id: Ic2431233fd174afc2c84c4794e20552e6e88b1dc
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master/r/1474715
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/gr_vgpu.c')
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/gr_vgpu.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c index a001b54e..e3dfb874 100644 --- a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c | |||
@@ -35,7 +35,7 @@ static void vgpu_gr_detect_sm_arch(struct gk20a *g) | |||
35 | priv->constants.sm_arch_warp_count; | 35 | priv->constants.sm_arch_warp_count; |
36 | } | 36 | } |
37 | 37 | ||
38 | static int vgpu_gr_commit_inst(struct channel_gk20a *c, u64 gpu_va) | 38 | int vgpu_gr_commit_inst(struct channel_gk20a *c, u64 gpu_va) |
39 | { | 39 | { |
40 | struct tegra_vgpu_cmd_msg msg; | 40 | struct tegra_vgpu_cmd_msg msg; |
41 | struct tegra_vgpu_ch_ctx_params *p = &msg.params.ch_ctx; | 41 | struct tegra_vgpu_ch_ctx_params *p = &msg.params.ch_ctx; |
@@ -422,6 +422,8 @@ static void vgpu_gr_free_channel_ctx(struct channel_gk20a *c) | |||
422 | { | 422 | { |
423 | gk20a_dbg_fn(""); | 423 | gk20a_dbg_fn(""); |
424 | 424 | ||
425 | if (c->g->ops.fifo.free_channel_ctx_header) | ||
426 | c->g->ops.fifo.free_channel_ctx_header(c); | ||
425 | vgpu_gr_unmap_global_ctx_buffers(c); | 427 | vgpu_gr_unmap_global_ctx_buffers(c); |
426 | vgpu_gr_free_channel_patch_ctx(c); | 428 | vgpu_gr_free_channel_patch_ctx(c); |
427 | vgpu_gr_free_channel_pm_ctx(c); | 429 | vgpu_gr_free_channel_pm_ctx(c); |
@@ -551,7 +553,7 @@ static int vgpu_gr_alloc_obj_ctx(struct channel_gk20a *c, | |||
551 | } | 553 | } |
552 | 554 | ||
553 | /* commit gr ctx buffer */ | 555 | /* commit gr ctx buffer */ |
554 | err = vgpu_gr_commit_inst(c, ch_ctx->gr_ctx->mem.gpu_va); | 556 | err = g->ops.gr.commit_inst(c, ch_ctx->gr_ctx->mem.gpu_va); |
555 | if (err) { | 557 | if (err) { |
556 | nvgpu_err(g, "fail to commit gr ctx buffer"); | 558 | nvgpu_err(g, "fail to commit gr ctx buffer"); |
557 | goto out; | 559 | goto out; |
@@ -1227,6 +1229,7 @@ void vgpu_init_gr_ops(struct gpu_ops *gops) | |||
1227 | gops->gr.clear_sm_error_state = vgpu_gr_clear_sm_error_state; | 1229 | gops->gr.clear_sm_error_state = vgpu_gr_clear_sm_error_state; |
1228 | gops->gr.suspend_contexts = vgpu_gr_suspend_contexts; | 1230 | gops->gr.suspend_contexts = vgpu_gr_suspend_contexts; |
1229 | gops->gr.resume_contexts = vgpu_gr_resume_contexts; | 1231 | gops->gr.resume_contexts = vgpu_gr_resume_contexts; |
1232 | gops->gr.commit_inst = vgpu_gr_commit_inst; | ||
1230 | gops->gr.dump_gr_regs = NULL; | 1233 | gops->gr.dump_gr_regs = NULL; |
1231 | gops->gr.set_boosted_ctx = NULL; | 1234 | gops->gr.set_boosted_ctx = NULL; |
1232 | gops->gr.update_boosted_ctx = NULL; | 1235 | gops->gr.update_boosted_ctx = NULL; |