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authorDebarshi Dutta <ddutta@nvidia.com>2022-01-30 21:43:19 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2022-02-02 15:10:51 -0500
commit46b43d2b2485233397f4f62b9bac6d35434b7aea (patch)
tree3a0c2b31daf2f8d65123f0aaee4d0af182cbbf3c /drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c
parentde418f6ef634220194514a72db332d9fba350856 (diff)
gpu: nvgpu: add support for disabling l3 via DT
On volta the GPU determines whether to do L3 allocation for a mapping by checking bit 36 of the physical address. So if a mapping should allocate lines in the L3 this bit must be set. However, when the physical addresses for 64GB of RAM uses the 36th bit resulting in a conflict. Thus, add support for disabling l3 support for SKUs having 64GB of physical memory. Bug 3486025 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Change-Id: Ic540e754274cf1d9e6625493962699d21509e540 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2661548 Reviewed-by: Brad Griffis <bgriffis@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Tested-by: Brad Griffis <bgriffis@nvidia.com> GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c')
-rw-r--r--drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c
index 926f243d..fe28bf21 100644
--- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c
+++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Virtualized GPU Memory Management 2 * Virtualized GPU Memory Management
3 * 3 *
4 * Copyright (c) 2015-2021, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2015-2022, NVIDIA CORPORATION. All rights reserved.
5 * 5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a 6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"), 7 * copy of this software and associated documentation files (the "Software"),
@@ -178,8 +178,10 @@ u64 vgpu_gp10b_locked_gmmu_map(struct vm_gk20a *vm,
178 p->flags = TEGRA_VGPU_MAP_CACHEABLE; 178 p->flags = TEGRA_VGPU_MAP_CACHEABLE;
179 if (flags & NVGPU_VM_MAP_IO_COHERENT) 179 if (flags & NVGPU_VM_MAP_IO_COHERENT)
180 p->flags |= TEGRA_VGPU_MAP_IO_COHERENT; 180 p->flags |= TEGRA_VGPU_MAP_IO_COHERENT;
181 if (flags & NVGPU_VM_MAP_L3_ALLOC) 181 if (!nvgpu_is_enabled(g, NVGPU_DISABLE_L3_SUPPORT)) {
182 p->flags |= TEGRA_VGPU_MAP_L3_ALLOC; 182 if (flags & NVGPU_VM_MAP_L3_ALLOC)
183 p->flags |= TEGRA_VGPU_MAP_L3_ALLOC;
184 }
183 if (flags & NVGPU_VM_MAP_PLATFORM_ATOMIC) { 185 if (flags & NVGPU_VM_MAP_PLATFORM_ATOMIC) {
184 p->flags |= TEGRA_VGPU_MAP_PLATFORM_ATOMIC; 186 p->flags |= TEGRA_VGPU_MAP_PLATFORM_ATOMIC;
185 } 187 }