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author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2018-09-14 00:07:51 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-09-24 11:11:44 -0400 |
commit | 7465926ccdcdad87c22c788fe04fc11961df53ba (patch) | |
tree | 9f1ce234cd0319c07a135974e2126484b3c67d81 /drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c | |
parent | a4065effdca2d16a870d05f1bf8715267635d401 (diff) |
gpu:nvgpu: PMU cleanup for ACR
- Removed ACR support code from PMU module
- Deleted ACR related ops from pmu ops
- Deleted assigning of ACR related ops
using pmu ops during HAL init
-Removed code related to ACR bootstrap &
dependent code for all chips.
JIRA NVGPU-1147
Change-Id: I47a851a6b67a9aacde863685537c34566f97dc8d
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1817990
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c')
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c index 2ec08ae6..56a6b01a 100644 --- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c | |||
@@ -604,19 +604,12 @@ int vgpu_gp10b_init_hal(struct gk20a *g) | |||
604 | /* Add in ops from gm20b acr */ | 604 | /* Add in ops from gm20b acr */ |
605 | gops->pmu.is_pmu_supported = gm20b_is_pmu_supported, | 605 | gops->pmu.is_pmu_supported = gm20b_is_pmu_supported, |
606 | gops->pmu.prepare_ucode = prepare_ucode_blob, | 606 | gops->pmu.prepare_ucode = prepare_ucode_blob, |
607 | gops->pmu.pmu_setup_hw_and_bootstrap = gm20b_bootstrap_hs_flcn, | ||
608 | gops->pmu.is_lazy_bootstrap = gm20b_is_lazy_bootstrap, | 607 | gops->pmu.is_lazy_bootstrap = gm20b_is_lazy_bootstrap, |
609 | gops->pmu.is_priv_load = gm20b_is_priv_load, | 608 | gops->pmu.is_priv_load = gm20b_is_priv_load, |
610 | gops->pmu.get_wpr = gm20b_wpr_info, | ||
611 | gops->pmu.alloc_blob_space = gm20b_alloc_blob_space, | ||
612 | gops->pmu.pmu_populate_loader_cfg = | 609 | gops->pmu.pmu_populate_loader_cfg = |
613 | gm20b_pmu_populate_loader_cfg, | 610 | gm20b_pmu_populate_loader_cfg, |
614 | gops->pmu.flcn_populate_bl_dmem_desc = | 611 | gops->pmu.flcn_populate_bl_dmem_desc = |
615 | gm20b_flcn_populate_bl_dmem_desc, | 612 | gm20b_flcn_populate_bl_dmem_desc, |
616 | gops->pmu.falcon_wait_for_halt = pmu_wait_for_halt, | ||
617 | gops->pmu.falcon_clear_halt_interrupt_status = | ||
618 | clear_halt_interrupt_status, | ||
619 | gops->pmu.init_falcon_setup_hw = gm20b_init_pmu_setup_hw1, | ||
620 | 613 | ||
621 | gops->pmu.init_wpr_region = gm20b_pmu_init_acr; | 614 | gops->pmu.init_wpr_region = gm20b_pmu_init_acr; |
622 | gops->pmu.load_lsfalcon_ucode = gp10b_load_falcon_ucode; | 615 | gops->pmu.load_lsfalcon_ucode = gp10b_load_falcon_ucode; |
@@ -628,12 +621,10 @@ int vgpu_gp10b_init_hal(struct gk20a *g) | |||
628 | /* Inherit from gk20a */ | 621 | /* Inherit from gk20a */ |
629 | gops->pmu.is_pmu_supported = gk20a_is_pmu_supported, | 622 | gops->pmu.is_pmu_supported = gk20a_is_pmu_supported, |
630 | gops->pmu.prepare_ucode = nvgpu_pmu_prepare_ns_ucode_blob, | 623 | gops->pmu.prepare_ucode = nvgpu_pmu_prepare_ns_ucode_blob, |
631 | gops->pmu.pmu_setup_hw_and_bootstrap = gk20a_init_pmu_setup_hw1, | ||
632 | gops->pmu.pmu_nsbootstrap = pmu_bootstrap, | 624 | gops->pmu.pmu_nsbootstrap = pmu_bootstrap, |
633 | 625 | ||
634 | gops->pmu.load_lsfalcon_ucode = NULL; | 626 | gops->pmu.load_lsfalcon_ucode = NULL; |
635 | gops->pmu.init_wpr_region = NULL; | 627 | gops->pmu.init_wpr_region = NULL; |
636 | gops->pmu.pmu_setup_hw_and_bootstrap = gp10b_init_pmu_setup_hw1; | ||
637 | 628 | ||
638 | gops->gr.load_ctxsw_ucode = gr_gk20a_load_ctxsw_ucode; | 629 | gops->gr.load_ctxsw_ucode = gr_gk20a_load_ctxsw_ucode; |
639 | } | 630 | } |