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| author | Scott Long <scottl@nvidia.com> | 2018-08-08 21:30:09 -0400 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-08-22 20:31:42 -0400 |
| commit | 07f6739285140d7c5335ddcb8996450966bfc175 (patch) | |
| tree | c7f1b3a73d519e44e4fe0d29516e6516740edb26 /drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c | |
| parent | 1c13da1d29c344cb60953eabeca56b601446c64a (diff) | |
gpu: nvgpu: switch gk20a nonstall ops to #defines
Fix MISRA rule 10.1 violations involving gk20a_nonstall_ops
enums by replacing them with with corresponding #defines.
Because these values can be used in expressions that require
unsigned values (e.g. bitwise OR) we cannot use enums.
The g->ce2.isr_nonstall() function was previously returning an
int that was a combination of gk20a_nonstall_ops enum bits which
led to the violations.
JIRA NVGPU-650
Change-Id: I6210aacec8829b3c8d339c5fe3db2f3069c67406
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1796242
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c')
0 files changed, 0 insertions, 0 deletions