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author | Konsta Holtta <kholtta@nvidia.com> | 2016-06-06 09:22:48 -0400 |
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committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-06-07 12:24:14 -0400 |
commit | 8432f6d80a0590e8ac10849443ac27351471505e (patch) | |
tree | 34e61ffc7ffe6db33a102d0d0188deb0b0e582a3 /drivers/gpu/nvgpu/vgpu/gm20b | |
parent | 697c8c1a98f09906c6513a0ed62052a375e83dc9 (diff) |
gpu: nvgpu: cache whole bar0_window for mem accesses
Save the whole bar0 window register that encodes also the target
aperture (vid/sys mem) instead of only the base address that could
overlap between the two.
JIRA DNVGPU-23
Change-Id: I2ccbea0e1f7c7310c1ca6b158afafe8fd974a615
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1159523
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/gm20b')
0 files changed, 0 insertions, 0 deletions