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| author | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-05-17 18:17:23 -0400 |
|---|---|---|
| committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-05-20 17:21:32 -0400 |
| commit | a21dcf0bc6bca226582aae45e3a92fe1f7c19e56 (patch) | |
| tree | d7407a04e1d72a6ac9ebf4b67004b092a6dd8556 /drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | |
| parent | 9e908d2a8dfb986d2acd024b986ba9917cfe71b1 (diff) | |
gpu: nvgpu: Enable CE in GR reset
Enable GRCE when enabling GR. Also use the reset mask read from
device info instead of using the hard coded value.
Change-Id: I4812c32d09ea8b5e07abd1b2c6f1efdbe00cb36e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1149359
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/fifo_vgpu.c')
0 files changed, 0 insertions, 0 deletions