diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2017-04-06 16:10:30 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-04-10 15:24:27 -0400 |
commit | 5405070ecd27ce462babc1dff231fec5cd8bd6b7 (patch) | |
tree | 903461959633aec359b5bb3f4f660c5dcb6bdbcf /drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | |
parent | 3a1104c3699b05201abf48ed9283bb8ccbe42732 (diff) |
gpu: nvgpu: vgpu: Use new error macros
gk20a_err() and gk20a_warn() require a struct device pointer,
which is not portable across operating systems. The new nvgpu_err()
and nvgpu_warn() macros take struct gk20a pointer. Convert code
to use the more portable macros.
JIRA NVGPU-16
Change-Id: I071e8c50959bfa81730ca964d912bc69f9c7e6ad
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1457355
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/fifo_vgpu.c')
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c index e2883f7c..e775abbb 100644 --- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | |||
@@ -78,7 +78,7 @@ static int vgpu_channel_alloc_inst(struct gk20a *g, struct channel_gk20a *ch) | |||
78 | p->pid = (u64)current->tgid; | 78 | p->pid = (u64)current->tgid; |
79 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | 79 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); |
80 | if (err || msg.ret) { | 80 | if (err || msg.ret) { |
81 | gk20a_err(dev_from_gk20a(g), "fail"); | 81 | nvgpu_err(g, "fail"); |
82 | return -ENOMEM; | 82 | return -ENOMEM; |
83 | } | 83 | } |
84 | 84 | ||
@@ -365,21 +365,20 @@ static int vgpu_init_fifo_setup_hw(struct gk20a *g) | |||
365 | smp_mb(); | 365 | smp_mb(); |
366 | 366 | ||
367 | if (v1 != gk20a_bar1_readl(g, bar1_vaddr)) { | 367 | if (v1 != gk20a_bar1_readl(g, bar1_vaddr)) { |
368 | gk20a_err(dev_from_gk20a(g), "bar1 broken @ gk20a!"); | 368 | nvgpu_err(g, "bar1 broken @ gk20a!"); |
369 | return -EINVAL; | 369 | return -EINVAL; |
370 | } | 370 | } |
371 | 371 | ||
372 | gk20a_bar1_writel(g, bar1_vaddr, v2); | 372 | gk20a_bar1_writel(g, bar1_vaddr, v2); |
373 | 373 | ||
374 | if (v2 != gk20a_bar1_readl(g, bar1_vaddr)) { | 374 | if (v2 != gk20a_bar1_readl(g, bar1_vaddr)) { |
375 | gk20a_err(dev_from_gk20a(g), "bar1 broken @ gk20a!"); | 375 | nvgpu_err(g, "bar1 broken @ gk20a!"); |
376 | return -EINVAL; | 376 | return -EINVAL; |
377 | } | 377 | } |
378 | 378 | ||
379 | /* is it visible to the cpu? */ | 379 | /* is it visible to the cpu? */ |
380 | if (*cpu_vaddr != v2) { | 380 | if (*cpu_vaddr != v2) { |
381 | gk20a_err(dev_from_gk20a(g), | 381 | nvgpu_err(g, "cpu didn't see bar1 write @ %p!", |
382 | "cpu didn't see bar1 write @ %p!", | ||
383 | cpu_vaddr); | 382 | cpu_vaddr); |
384 | } | 383 | } |
385 | 384 | ||
@@ -426,7 +425,7 @@ static int vgpu_fifo_preempt_channel(struct gk20a *g, u32 hw_chid) | |||
426 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | 425 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); |
427 | 426 | ||
428 | if (err || msg.ret) { | 427 | if (err || msg.ret) { |
429 | gk20a_err(dev_from_gk20a(g), | 428 | nvgpu_err(g, |
430 | "preempt channel %d failed\n", hw_chid); | 429 | "preempt channel %d failed\n", hw_chid); |
431 | err = -ENOMEM; | 430 | err = -ENOMEM; |
432 | } | 431 | } |
@@ -450,7 +449,7 @@ static int vgpu_fifo_preempt_tsg(struct gk20a *g, u32 tsgid) | |||
450 | err = err ? err : msg.ret; | 449 | err = err ? err : msg.ret; |
451 | 450 | ||
452 | if (err) { | 451 | if (err) { |
453 | gk20a_err(dev_from_gk20a(g), | 452 | nvgpu_err(g, |
454 | "preempt tsg %u failed\n", tsgid); | 453 | "preempt tsg %u failed\n", tsgid); |
455 | } | 454 | } |
456 | 455 | ||
@@ -722,7 +721,7 @@ int vgpu_fifo_isr(struct gk20a *g, struct tegra_vgpu_fifo_intr_info *info) | |||
722 | if (!ch) | 721 | if (!ch) |
723 | return 0; | 722 | return 0; |
724 | 723 | ||
725 | gk20a_err(dev_from_gk20a(g), "fifo intr (%d) on ch %u", | 724 | nvgpu_err(g, "fifo intr (%d) on ch %u", |
726 | info->type, info->chid); | 725 | info->type, info->chid); |
727 | 726 | ||
728 | trace_gk20a_channel_reset(ch->hw_chid, ch->tsgid); | 727 | trace_gk20a_channel_reset(ch->hw_chid, ch->tsgid); |