gpu: nvgpu: add ctxsw channel reset event

Generate a ctxsw channel reset when engine needs to be reset.
This event is generated by the driver, while other events are
generated by FECS.

JIRA ELVR-314

Change-Id: I7791cf3e538782464c37c442c871acb177484566
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1129029
(cherry picked from commit 114038a1a5d9e8941bc53f3e95115b01dd1f8c6e)
Reviewed-on: http://git-master/r/1134379
(cherry picked from commit 15fa2a7b48a0937dfd449ca0c4ed5ad3a863d6bf)
Reviewed-on: http://git-master/r/1123916
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 2 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c
index d1cba979..83fd65ff 100644
--- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c
@@ -17,6 +17,7 @@
 #include <trace/events/gk20a.h>
 
 #include "vgpu/vgpu.h"
+#include "gk20a/ctxsw_trace_gk20a.h"
 #include "gk20a/hw_fifo_gk20a.h"
 #include "gk20a/hw_ram_gk20a.h"
 
@@ -629,7 +630,7 @@ int vgpu_fifo_isr(struct gk20a *g, struct tegra_vgpu_fifo_intr_info *info)
         gk20a_err(dev_from_gk20a(g), "fifo intr (%d) on ch %u",
                 info->type, info->chid);
 
-        trace_gk20a_channel_reset(ch->hw_chid, ch->tsgid);
+        gk20a_ctxsw_trace_channel_reset(g, ch);
 
         switch (info->type) {
         case TEGRA_VGPU_FIFO_INTR_PBDMA: