diff options
author | Haley Teng <hteng@nvidia.com> | 2016-04-21 09:02:14 -0400 |
---|---|---|
committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-05-09 12:52:04 -0400 |
commit | 4c4d0e6eb29fab7c1fb54cb7a7f5e3e41e245991 (patch) | |
tree | 258d1918e82725739932b8e16f7c4296178fae74 /drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | |
parent | f138e7f69d7918d597d2df34af1e1d0353ea2888 (diff) |
nvgpu: vgpu: create fifo.force_reset_ch in gpu_ops
gk20a_fifo_force_reset_ch() does not support vgpu now, so we need to
create a function pointer in gpu_ops and assign it differently for
vgpu and non-vgpu.
Bug 200184349
Change-Id: I5f8f4f731b4b970c4ff8de65531f25568e7691b6
Signed-off-by: Haley Teng <hteng@nvidia.com>
Reviewed-on: http://git-master/r/1130420
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/fifo_vgpu.c')
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c index dc82d57b..66b5e410 100644 --- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | |||
@@ -585,6 +585,17 @@ static int vgpu_channel_set_timeslice(struct channel_gk20a *ch, u32 timeslice) | |||
585 | return err ? err : msg.ret; | 585 | return err ? err : msg.ret; |
586 | } | 586 | } |
587 | 587 | ||
588 | static int vgpu_fifo_force_reset_ch(struct channel_gk20a *ch, bool verbose) | ||
589 | { | ||
590 | gk20a_dbg_fn(""); | ||
591 | |||
592 | if (verbose) | ||
593 | gk20a_warn(dev_from_gk20a(ch->g), | ||
594 | "channel force reset is not supported"); | ||
595 | |||
596 | return -ENOSYS; | ||
597 | } | ||
598 | |||
588 | static void vgpu_fifo_set_ctx_mmu_error(struct gk20a *g, | 599 | static void vgpu_fifo_set_ctx_mmu_error(struct gk20a *g, |
589 | struct channel_gk20a *ch) | 600 | struct channel_gk20a *ch) |
590 | { | 601 | { |
@@ -664,6 +675,7 @@ void vgpu_init_fifo_ops(struct gpu_ops *gops) | |||
664 | { | 675 | { |
665 | gops->fifo.bind_channel = vgpu_channel_bind; | 676 | gops->fifo.bind_channel = vgpu_channel_bind; |
666 | gops->fifo.unbind_channel = vgpu_channel_unbind; | 677 | gops->fifo.unbind_channel = vgpu_channel_unbind; |
678 | gops->fifo.enable_channel = NULL; | ||
667 | gops->fifo.disable_channel = vgpu_channel_disable; | 679 | gops->fifo.disable_channel = vgpu_channel_disable; |
668 | gops->fifo.alloc_inst = vgpu_channel_alloc_inst; | 680 | gops->fifo.alloc_inst = vgpu_channel_alloc_inst; |
669 | gops->fifo.free_inst = vgpu_channel_free_inst; | 681 | gops->fifo.free_inst = vgpu_channel_free_inst; |
@@ -674,4 +686,5 @@ void vgpu_init_fifo_ops(struct gpu_ops *gops) | |||
674 | gops->fifo.channel_set_priority = vgpu_channel_set_priority; | 686 | gops->fifo.channel_set_priority = vgpu_channel_set_priority; |
675 | gops->fifo.set_runlist_interleave = vgpu_fifo_set_runlist_interleave; | 687 | gops->fifo.set_runlist_interleave = vgpu_fifo_set_runlist_interleave; |
676 | gops->fifo.channel_set_timeslice = vgpu_channel_set_timeslice; | 688 | gops->fifo.channel_set_timeslice = vgpu_channel_set_timeslice; |
689 | gops->fifo.force_reset_ch = vgpu_fifo_force_reset_ch; | ||
677 | } | 690 | } |