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authorDeepak Nibade <dnibade@nvidia.com>2017-11-14 09:43:28 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-11-17 11:27:19 -0500
commitb42fb7ba26b565f93118fbdd9e17b42ee6144c5e (patch)
tree26e2d919f019d15b51bba4d7b5c938f77ad5cff5 /drivers/gpu/nvgpu/vgpu/fecs_trace_vgpu.c
parentb7cc3a2aa6c92a09eed43513287c9062f22ad127 (diff)
gpu: nvgpu: move vgpu code to linux
Most of VGPU code is linux specific but lies in common code So until VGPU code is properly abstracted and made os-independent, move all of VGPU code to linux specific directory Handle corresponding Makefile changes Update all #includes to reflect new paths Add GPL license to newly added linux files Jira NVGPU-387 Change-Id: Ic133e4c80e570bcc273f0dacf45283fefd678923 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1599472 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/fecs_trace_vgpu.c')
-rw-r--r--drivers/gpu/nvgpu/vgpu/fecs_trace_vgpu.c231
1 files changed, 0 insertions, 231 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/fecs_trace_vgpu.c b/drivers/gpu/nvgpu/vgpu/fecs_trace_vgpu.c
deleted file mode 100644
index dc7608ff..00000000
--- a/drivers/gpu/nvgpu/vgpu/fecs_trace_vgpu.c
+++ /dev/null
@@ -1,231 +0,0 @@
1/*
2 * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <linux/string.h>
24#include <linux/tegra-ivc.h>
25#include <linux/tegra_vgpu.h>
26
27#include <uapi/linux/nvgpu.h>
28
29#include <nvgpu/kmem.h>
30#include <nvgpu/bug.h>
31#include <nvgpu/enabled.h>
32#include <nvgpu/ctxsw_trace.h>
33
34#include "gk20a/gk20a.h"
35#include "vgpu.h"
36#include "fecs_trace_vgpu.h"
37
38struct vgpu_fecs_trace {
39 struct tegra_hv_ivm_cookie *cookie;
40 struct nvgpu_ctxsw_ring_header *header;
41 struct nvgpu_ctxsw_trace_entry *entries;
42 int num_entries;
43 bool enabled;
44 void *buf;
45};
46
47int vgpu_fecs_trace_init(struct gk20a *g)
48{
49 struct device *dev = dev_from_gk20a(g);
50 struct device_node *np = dev->of_node;
51 struct of_phandle_args args;
52 struct device_node *hv_np;
53 struct vgpu_fecs_trace *vcst;
54 u32 mempool;
55 int err;
56
57 gk20a_dbg_fn("");
58
59 vcst = nvgpu_kzalloc(g, sizeof(*vcst));
60 if (!vcst)
61 return -ENOMEM;
62
63 err = of_parse_phandle_with_fixed_args(np,
64 "mempool-fecs-trace", 1, 0, &args);
65 if (err) {
66 dev_info(dev_from_gk20a(g), "does not support fecs trace\n");
67 goto fail;
68 }
69 __nvgpu_set_enabled(g, NVGPU_SUPPORT_FECS_CTXSW_TRACE, true);
70
71 hv_np = args.np;
72 mempool = args.args[0];
73 vcst->cookie = tegra_hv_mempool_reserve(hv_np, mempool);
74 if (IS_ERR(vcst->cookie)) {
75 dev_info(dev_from_gk20a(g),
76 "mempool %u reserve failed\n", mempool);
77 vcst->cookie = NULL;
78 err = -EINVAL;
79 goto fail;
80 }
81
82 vcst->buf = ioremap_cache(vcst->cookie->ipa, vcst->cookie->size);
83 if (!vcst->buf) {
84 dev_info(dev_from_gk20a(g), "ioremap_cache failed\n");
85 err = -EINVAL;
86 goto fail;
87 }
88 vcst->header = vcst->buf;
89 vcst->num_entries = vcst->header->num_ents;
90 if (unlikely(vcst->header->ent_size != sizeof(*vcst->entries))) {
91 dev_err(dev_from_gk20a(g),
92 "entry size mismatch\n");
93 goto fail;
94 }
95 vcst->entries = vcst->buf + sizeof(*vcst->header);
96 g->fecs_trace = (struct gk20a_fecs_trace *)vcst;
97
98 return 0;
99fail:
100 iounmap(vcst->buf);
101 if (vcst->cookie)
102 tegra_hv_mempool_unreserve(vcst->cookie);
103 nvgpu_kfree(g, vcst);
104 return err;
105}
106
107int vgpu_fecs_trace_deinit(struct gk20a *g)
108{
109 struct vgpu_fecs_trace *vcst = (struct vgpu_fecs_trace *)g->fecs_trace;
110
111 iounmap(vcst->buf);
112 tegra_hv_mempool_unreserve(vcst->cookie);
113 nvgpu_kfree(g, vcst);
114 return 0;
115}
116
117int vgpu_fecs_trace_enable(struct gk20a *g)
118{
119 struct vgpu_fecs_trace *vcst = (struct vgpu_fecs_trace *)g->fecs_trace;
120 struct tegra_vgpu_cmd_msg msg = {
121 .cmd = TEGRA_VGPU_CMD_FECS_TRACE_ENABLE,
122 .handle = vgpu_get_handle(g),
123 };
124 int err;
125
126 err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
127 err = err ? err : msg.ret;
128 WARN_ON(err);
129 vcst->enabled = !err;
130 return err;
131}
132
133int vgpu_fecs_trace_disable(struct gk20a *g)
134{
135 struct vgpu_fecs_trace *vcst = (struct vgpu_fecs_trace *)g->fecs_trace;
136 struct tegra_vgpu_cmd_msg msg = {
137 .cmd = TEGRA_VGPU_CMD_FECS_TRACE_DISABLE,
138 .handle = vgpu_get_handle(g),
139 };
140 int err;
141
142 vcst->enabled = false;
143 err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
144 err = err ? err : msg.ret;
145 WARN_ON(err);
146 return err;
147}
148
149bool vgpu_fecs_trace_is_enabled(struct gk20a *g)
150{
151 struct vgpu_fecs_trace *vcst = (struct vgpu_fecs_trace *)g->fecs_trace;
152
153 return (vcst && vcst->enabled);
154}
155
156int vgpu_fecs_trace_poll(struct gk20a *g)
157{
158 struct tegra_vgpu_cmd_msg msg = {
159 .cmd = TEGRA_VGPU_CMD_FECS_TRACE_POLL,
160 .handle = vgpu_get_handle(g),
161 };
162 int err;
163
164 err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
165 err = err ? err : msg.ret;
166 WARN_ON(err);
167 return err;
168}
169
170int vgpu_alloc_user_buffer(struct gk20a *g, void **buf, size_t *size)
171{
172 struct vgpu_fecs_trace *vcst = (struct vgpu_fecs_trace *)g->fecs_trace;
173
174 *buf = vcst->buf;
175 *size = vcst->cookie->size;
176 return 0;
177}
178
179int vgpu_free_user_buffer(struct gk20a *g)
180{
181 return 0;
182}
183
184int vgpu_mmap_user_buffer(struct gk20a *g, struct vm_area_struct *vma)
185{
186 struct vgpu_fecs_trace *vcst = (struct vgpu_fecs_trace *)g->fecs_trace;
187 unsigned long size = vcst->cookie->size;
188 unsigned long vsize = vma->vm_end - vma->vm_start;
189
190 size = min(size, vsize);
191 size = round_up(size, PAGE_SIZE);
192
193 return remap_pfn_range(vma, vma->vm_start,
194 vcst->cookie->ipa >> PAGE_SHIFT,
195 size,
196 vma->vm_page_prot);
197}
198
199int vgpu_fecs_trace_max_entries(struct gk20a *g,
200 struct nvgpu_ctxsw_trace_filter *filter)
201{
202 struct vgpu_fecs_trace *vcst = (struct vgpu_fecs_trace *)g->fecs_trace;
203
204 return vcst->header->num_ents;
205}
206
207#if NVGPU_CTXSW_FILTER_SIZE != TEGRA_VGPU_FECS_TRACE_FILTER_SIZE
208#error "FECS trace filter size mismatch!"
209#endif
210
211int vgpu_fecs_trace_set_filter(struct gk20a *g,
212 struct nvgpu_ctxsw_trace_filter *filter)
213{
214 struct tegra_vgpu_cmd_msg msg = {
215 .cmd = TEGRA_VGPU_CMD_FECS_TRACE_SET_FILTER,
216 .handle = vgpu_get_handle(g),
217 };
218 struct tegra_vgpu_fecs_trace_filter *p = &msg.params.fecs_trace_filter;
219 int err;
220
221 memcpy(&p->tag_bits, &filter->tag_bits, sizeof(p->tag_bits));
222 err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
223 err = err ? err : msg.ret;
224 WARN_ON(err);
225 return err;
226}
227
228void vgpu_fecs_trace_data_update(struct gk20a *g)
229{
230 gk20a_ctxsw_trace_wake_up(g, 0);
231}