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authorRichard Zhao <rizhao@nvidia.com>2016-07-21 19:51:40 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2016-08-15 14:41:16 -0400
commite1438818b90c5b0d73aae800b12bd6b36aec5142 (patch)
treef0582cda23552526c3067e90f4cb74b461d50d73 /drivers/gpu/nvgpu/vgpu/dbg_vgpu.c
parent33ff34887f560449828e79170a2a36a97496eeec (diff)
gpu: nvgpu: vgpu: add vgpu private data and helper functions
Move vgpu private data to a dedicated structure and allocate it at probe time. Also add virt_handle helper function which is used everywhere. JIRA VFND-2103 Change-Id: I125911420be72ca9be948125d8357fa85d1d3afd Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1185206 GVS: Gerrit_Virtual_Submit Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/dbg_vgpu.c')
-rw-r--r--drivers/gpu/nvgpu/vgpu/dbg_vgpu.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/dbg_vgpu.c b/drivers/gpu/nvgpu/vgpu/dbg_vgpu.c
index 4e4379f7..c312c419 100644
--- a/drivers/gpu/nvgpu/vgpu/dbg_vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/dbg_vgpu.c
@@ -27,7 +27,6 @@ static int vgpu_exec_regops(struct dbg_session_gk20a *dbg_s,
27 u64 num_ops) 27 u64 num_ops)
28{ 28{
29 struct channel_gk20a *ch; 29 struct channel_gk20a *ch;
30 struct gk20a_platform *platform = gk20a_get_platform(dbg_s->g->dev);
31 struct tegra_vgpu_cmd_msg msg; 30 struct tegra_vgpu_cmd_msg msg;
32 struct tegra_vgpu_reg_ops_params *p = &msg.params.reg_ops; 31 struct tegra_vgpu_reg_ops_params *p = &msg.params.reg_ops;
33 void *oob; 32 void *oob;
@@ -54,7 +53,7 @@ static int vgpu_exec_regops(struct dbg_session_gk20a *dbg_s,
54 memcpy(oob, ops, ops_size); 53 memcpy(oob, ops, ops_size);
55 54
56 msg.cmd = TEGRA_VGPU_CMD_REG_OPS; 55 msg.cmd = TEGRA_VGPU_CMD_REG_OPS;
57 msg.handle = platform->virt_handle; 56 msg.handle = vgpu_get_handle(dbg_s->g);
58 ch = nvgpu_dbg_gpu_get_session_channel(dbg_s); 57 ch = nvgpu_dbg_gpu_get_session_channel(dbg_s);
59 p->handle = ch ? ch->virt_ctx : 0; 58 p->handle = ch ? ch->virt_ctx : 0;
60 p->num_ops = num_ops; 59 p->num_ops = num_ops;
@@ -71,7 +70,6 @@ fail:
71 70
72static int vgpu_dbg_set_powergate(struct dbg_session_gk20a *dbg_s, __u32 mode) 71static int vgpu_dbg_set_powergate(struct dbg_session_gk20a *dbg_s, __u32 mode)
73{ 72{
74 struct gk20a_platform *platform = gk20a_get_platform(dbg_s->g->dev);
75 struct tegra_vgpu_cmd_msg msg; 73 struct tegra_vgpu_cmd_msg msg;
76 struct tegra_vgpu_set_powergate_params *p = &msg.params.set_powergate; 74 struct tegra_vgpu_set_powergate_params *p = &msg.params.set_powergate;
77 int err = 0; 75 int err = 0;
@@ -95,7 +93,7 @@ static int vgpu_dbg_set_powergate(struct dbg_session_gk20a *dbg_s, __u32 mode)
95 } 93 }
96 94
97 msg.cmd = TEGRA_VGPU_CMD_SET_POWERGATE; 95 msg.cmd = TEGRA_VGPU_CMD_SET_POWERGATE;
98 msg.handle = platform->virt_handle; 96 msg.handle = vgpu_get_handle(dbg_s->g);
99 p->mode = mode; 97 p->mode = mode;
100 err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); 98 err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
101 err = err ? err : msg.ret; 99 err = err ? err : msg.ret;