diff options
author | Richard Zhao <rizhao@nvidia.com> | 2018-01-30 02:24:37 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-02-27 17:30:52 -0500 |
commit | 6393eddfa996fba03464f897b85aa5ec79860fed (patch) | |
tree | 557ebe9be93e2b0464118e7d8ec019d9d5dbae5f /drivers/gpu/nvgpu/vgpu/dbg_vgpu.c | |
parent | 7932568b7fe9e16b2b83bc58b2b3686c0d5e52d4 (diff) |
gpu: nvgpu: vgpu: move common files out of linux folder
Most of files have been moved out of linux folder. More code could be
common as halifying going on.
Jira EVLR-2364
Change-Id: Ia9dbdbc82f45ceefe5c788eac7517000cd455d5e
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1649947
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/dbg_vgpu.c')
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/dbg_vgpu.c | 214 |
1 files changed, 214 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/dbg_vgpu.c b/drivers/gpu/nvgpu/vgpu/dbg_vgpu.c new file mode 100644 index 00000000..092954ed --- /dev/null +++ b/drivers/gpu/nvgpu/vgpu/dbg_vgpu.c | |||
@@ -0,0 +1,214 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2015-2018, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
20 | * DEALINGS IN THE SOFTWARE. | ||
21 | */ | ||
22 | |||
23 | #include <nvgpu/vgpu/vgpu_ivc.h> | ||
24 | #include <nvgpu/vgpu/tegra_vgpu.h> | ||
25 | #include <nvgpu/vgpu/vgpu.h> | ||
26 | #include <nvgpu/bug.h> | ||
27 | |||
28 | #include "gk20a/gk20a.h" | ||
29 | #include "gk20a/channel_gk20a.h" | ||
30 | #include "gk20a/dbg_gpu_gk20a.h" | ||
31 | #include "gk20a/regops_gk20a.h" | ||
32 | #include "dbg_vgpu.h" | ||
33 | |||
34 | int vgpu_exec_regops(struct dbg_session_gk20a *dbg_s, | ||
35 | struct nvgpu_dbg_reg_op *ops, | ||
36 | u64 num_ops) | ||
37 | { | ||
38 | struct channel_gk20a *ch; | ||
39 | struct tegra_vgpu_cmd_msg msg; | ||
40 | struct tegra_vgpu_reg_ops_params *p = &msg.params.reg_ops; | ||
41 | void *oob; | ||
42 | size_t oob_size, ops_size; | ||
43 | void *handle = NULL; | ||
44 | int err = 0; | ||
45 | |||
46 | gk20a_dbg_fn(""); | ||
47 | BUG_ON(sizeof(*ops) != sizeof(struct tegra_vgpu_reg_op)); | ||
48 | |||
49 | handle = vgpu_ivc_oob_get_ptr(vgpu_ivc_get_server_vmid(), | ||
50 | TEGRA_VGPU_QUEUE_CMD, | ||
51 | &oob, &oob_size); | ||
52 | if (!handle) | ||
53 | return -EINVAL; | ||
54 | |||
55 | ops_size = sizeof(*ops) * num_ops; | ||
56 | if (oob_size < ops_size) { | ||
57 | err = -ENOMEM; | ||
58 | goto fail; | ||
59 | } | ||
60 | |||
61 | memcpy(oob, ops, ops_size); | ||
62 | |||
63 | msg.cmd = TEGRA_VGPU_CMD_REG_OPS; | ||
64 | msg.handle = vgpu_get_handle(dbg_s->g); | ||
65 | ch = nvgpu_dbg_gpu_get_session_channel(dbg_s); | ||
66 | p->handle = ch ? ch->virt_ctx : 0; | ||
67 | p->num_ops = num_ops; | ||
68 | p->is_profiler = dbg_s->is_profiler; | ||
69 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
70 | err = err ? err : msg.ret; | ||
71 | if (!err) | ||
72 | memcpy(ops, oob, ops_size); | ||
73 | |||
74 | fail: | ||
75 | vgpu_ivc_oob_put_ptr(handle); | ||
76 | return err; | ||
77 | } | ||
78 | |||
79 | int vgpu_dbg_set_powergate(struct dbg_session_gk20a *dbg_s, bool disable_powergate) | ||
80 | { | ||
81 | struct tegra_vgpu_cmd_msg msg; | ||
82 | struct tegra_vgpu_set_powergate_params *p = &msg.params.set_powergate; | ||
83 | int err = 0; | ||
84 | u32 mode; | ||
85 | |||
86 | gk20a_dbg_fn(""); | ||
87 | |||
88 | /* Just return if requested mode is the same as the session's mode */ | ||
89 | if (disable_powergate) { | ||
90 | if (dbg_s->is_pg_disabled) | ||
91 | return 0; | ||
92 | dbg_s->is_pg_disabled = true; | ||
93 | mode = TEGRA_VGPU_POWERGATE_MODE_DISABLE; | ||
94 | } else { | ||
95 | if (!dbg_s->is_pg_disabled) | ||
96 | return 0; | ||
97 | dbg_s->is_pg_disabled = false; | ||
98 | mode = TEGRA_VGPU_POWERGATE_MODE_ENABLE; | ||
99 | } | ||
100 | |||
101 | msg.cmd = TEGRA_VGPU_CMD_SET_POWERGATE; | ||
102 | msg.handle = vgpu_get_handle(dbg_s->g); | ||
103 | p->mode = mode; | ||
104 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
105 | err = err ? err : msg.ret; | ||
106 | return err; | ||
107 | } | ||
108 | |||
109 | static int vgpu_sendrecv_prof_cmd(struct dbg_session_gk20a *dbg_s, u32 mode) | ||
110 | { | ||
111 | struct tegra_vgpu_cmd_msg msg; | ||
112 | struct tegra_vgpu_prof_mgt_params *p = &msg.params.prof_management; | ||
113 | int err = 0; | ||
114 | |||
115 | msg.cmd = TEGRA_VGPU_CMD_PROF_MGT; | ||
116 | msg.handle = vgpu_get_handle(dbg_s->g); | ||
117 | |||
118 | p->mode = mode; | ||
119 | |||
120 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
121 | err = err ? err : msg.ret; | ||
122 | return err; | ||
123 | } | ||
124 | |||
125 | bool vgpu_check_and_set_global_reservation( | ||
126 | struct dbg_session_gk20a *dbg_s, | ||
127 | struct dbg_profiler_object_data *prof_obj) | ||
128 | { | ||
129 | struct gk20a *g = dbg_s->g; | ||
130 | |||
131 | if (g->profiler_reservation_count > 0) | ||
132 | return false; | ||
133 | |||
134 | /* Check that another guest OS doesn't already have a reservation */ | ||
135 | if (!vgpu_sendrecv_prof_cmd(dbg_s, TEGRA_VGPU_PROF_GET_GLOBAL)) { | ||
136 | g->global_profiler_reservation_held = true; | ||
137 | g->profiler_reservation_count = 1; | ||
138 | dbg_s->has_profiler_reservation = true; | ||
139 | prof_obj->has_reservation = true; | ||
140 | return true; | ||
141 | } | ||
142 | return false; | ||
143 | } | ||
144 | |||
145 | bool vgpu_check_and_set_context_reservation( | ||
146 | struct dbg_session_gk20a *dbg_s, | ||
147 | struct dbg_profiler_object_data *prof_obj) | ||
148 | { | ||
149 | struct gk20a *g = dbg_s->g; | ||
150 | |||
151 | /* Assumes that we've already checked that no global reservation | ||
152 | * is in effect for this guest. | ||
153 | * | ||
154 | * If our reservation count is non-zero, then no other guest has the | ||
155 | * global reservation; if it is zero, need to check with RM server. | ||
156 | * | ||
157 | */ | ||
158 | if ((g->profiler_reservation_count != 0) || | ||
159 | !vgpu_sendrecv_prof_cmd(dbg_s, TEGRA_VGPU_PROF_GET_CONTEXT)) { | ||
160 | g->profiler_reservation_count++; | ||
161 | dbg_s->has_profiler_reservation = true; | ||
162 | prof_obj->has_reservation = true; | ||
163 | return true; | ||
164 | } | ||
165 | return false; | ||
166 | } | ||
167 | |||
168 | void vgpu_release_profiler_reservation( | ||
169 | struct dbg_session_gk20a *dbg_s, | ||
170 | struct dbg_profiler_object_data *prof_obj) | ||
171 | { | ||
172 | struct gk20a *g = dbg_s->g; | ||
173 | |||
174 | dbg_s->has_profiler_reservation = false; | ||
175 | prof_obj->has_reservation = false; | ||
176 | if (prof_obj->ch == NULL) | ||
177 | g->global_profiler_reservation_held = false; | ||
178 | |||
179 | /* If new reservation count is zero, notify server */ | ||
180 | g->profiler_reservation_count--; | ||
181 | if (g->profiler_reservation_count == 0) | ||
182 | vgpu_sendrecv_prof_cmd(dbg_s, TEGRA_VGPU_PROF_RELEASE); | ||
183 | } | ||
184 | |||
185 | static int vgpu_sendrecv_perfbuf_cmd(struct gk20a *g, u64 offset, u32 size) | ||
186 | { | ||
187 | struct mm_gk20a *mm = &g->mm; | ||
188 | struct vm_gk20a *vm = mm->perfbuf.vm; | ||
189 | struct tegra_vgpu_cmd_msg msg; | ||
190 | struct tegra_vgpu_perfbuf_mgt_params *p = | ||
191 | &msg.params.perfbuf_management; | ||
192 | int err; | ||
193 | |||
194 | msg.cmd = TEGRA_VGPU_CMD_PERFBUF_MGT; | ||
195 | msg.handle = vgpu_get_handle(g); | ||
196 | |||
197 | p->vm_handle = vm->handle; | ||
198 | p->offset = offset; | ||
199 | p->size = size; | ||
200 | |||
201 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
202 | err = err ? err : msg.ret; | ||
203 | return err; | ||
204 | } | ||
205 | |||
206 | int vgpu_perfbuffer_enable(struct gk20a *g, u64 offset, u32 size) | ||
207 | { | ||
208 | return vgpu_sendrecv_perfbuf_cmd(g, offset, size); | ||
209 | } | ||
210 | |||
211 | int vgpu_perfbuffer_disable(struct gk20a *g) | ||
212 | { | ||
213 | return vgpu_sendrecv_perfbuf_cmd(g, 0, 0); | ||
214 | } | ||