gpu: nvgpu: vgpu: dbg_set_powergate support

Add support for dbg_set_powergate when virtualized

Jira VFND-1905

Change-Id: I0d81c8863b3eda4ae4fee42e5a95d2fc9d78b174
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1162048
(cherry picked from commit 0dfc55f390a10e21ae13e14dd2f16e89a3bddfa7)
Reviewed-on: http://git-master/r/1167182
(cherry picked from commit 4e34a1844558d93da5ad208532ec28aeda228f95)
Reviewed-on: http://git-master/r/1174701
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>

1 files changed, 35 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/vgpu/dbg_vgpu.c b/drivers/gpu/nvgpu/vgpu/dbg_vgpu.c
index a9533e03..38f072de 100644
--- a/drivers/gpu/nvgpu/vgpu/dbg_vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/dbg_vgpu.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2015-2016, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -69,7 +69,41 @@ fail:
         return err;
 }
 
+static int vgpu_dbg_set_powergate(struct dbg_session_gk20a *dbg_s, __u32 mode)
+{
+        struct gk20a_platform *platform = gk20a_get_platform(dbg_s->g->dev);
+        struct tegra_vgpu_cmd_msg msg;
+        struct tegra_vgpu_set_powergate_params *p = &msg.params.set_powergate;
+        int err = 0;
+
+        gk20a_dbg_fn("");
+
+        /* Just return if requested mode is the same as the session's mode */
+        switch (mode) {
+        case NVGPU_DBG_GPU_POWERGATE_MODE_DISABLE:
+                if (dbg_s->is_pg_disabled)
+                        return 0;
+                dbg_s->is_pg_disabled = true;
+                break;
+        case NVGPU_DBG_GPU_POWERGATE_MODE_ENABLE:
+                if (!dbg_s->is_pg_disabled)
+                        return 0;
+                dbg_s->is_pg_disabled = false;
+                break;
+        default:
+                return -EINVAL;
+        }
+
+        msg.cmd = TEGRA_VGPU_CMD_SET_POWERGATE;
+        msg.handle = platform->virt_handle;
+        p->mode = mode;
+        err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
+        err = err ? err : msg.ret;
+        return err;
+}
+
 void vgpu_dbg_init(void)
 {
         dbg_gpu_session_ops_gk20a.exec_reg_ops = vgpu_exec_regops;
+        dbg_gpu_session_ops_gk20a.dbg_set_powergate = vgpu_dbg_set_powergate;
 }