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authorAlex Frid <afrid@nvidia.com>2014-09-30 18:23:59 -0400
committerDan Willemsen <dwillemsen@nvidia.com>2015-03-18 15:11:34 -0400
commit0f762c8510c9e55e617cbc91f55526ea99754969 (patch)
tree7243a4ccaaa025f76ee6138d19771fe8d0b9df97 /drivers/gpu/nvgpu/vgpu/Makefile
parentd451db820486b8b11dc3d9e699fdd778e1570fc4 (diff)
gpu: nvgpu: Update GM20b clock initialization
- Removed unnecessary static "initialized" variable (sw_ready flag is protecting from multiple initializations, anyway). - Used max frequency at min voltage to set initial configuration of GPCPLL in both NA and non-NA mode. For backward compatibility made sure initial PLL output rate do not exceed 1/3 of VCO minimum. Bug 1555318 Change-Id: If970c27442ea1109d4503a322998a6a26159c345 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/552370 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/Makefile')
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