gpu: nvgpu: cleanup return types for MISRA 10.3

This is a big cleanup of return types across a number of modules in the
nvgpu driver. Many functions were returning u32 but using negative
return codes. This is a MISRA 10.3 violation by assigning signed values
to a u32.

JIRA NVGPU-647

Change-Id: I59ee66706321f5b5b1a07ed8c24b81583e9ba28c
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1810743
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

6 files changed, 35 insertions, 35 deletions

diff --git a/drivers/gpu/nvgpu/therm/thrmchannel.c b/drivers/gpu/nvgpu/therm/thrmchannel.c
index de3de62a..7d196422 100644
--- a/drivers/gpu/nvgpu/therm/thrmchannel.c
+++ b/drivers/gpu/nvgpu/therm/thrmchannel.c
@@ -29,11 +29,11 @@
 #include "boardobj/boardobjgrp_e32.h"
 #include "gp106/bios_gp106.h"
 
-static u32 _therm_channel_pmudatainit_device(struct gk20a *g,
+static int _therm_channel_pmudatainit_device(struct gk20a *g,
                         struct boardobj *board_obj_ptr,
                         struct nv_pmu_boardobj *ppmudata)
 {
-        u32 status = 0;
+        int status = 0;
         struct therm_channel *pchannel;
         struct therm_channel_device *ptherm_channel;
         struct nv_pmu_therm_therm_channel_device_boardobj_set *pset;
@@ -68,7 +68,7 @@ static struct boardobj *construct_channel_device(struct gk20a *g,
         struct boardobj *board_obj_ptr = NULL;
         struct therm_channel *pchannel;
         struct therm_channel_device *pchannel_device;
-        u32 status;
+        int status;
         struct therm_channel_device *therm_device = (struct therm_channel_device*)pargs;
 
         status = boardobj_construct_super(g, &board_obj_ptr,
@@ -95,7 +95,7 @@ static struct boardobj *construct_channel_device(struct gk20a *g,
         return board_obj_ptr;
 }
 
-static u32 _therm_channel_pmudata_instget(struct gk20a *g,
+static int _therm_channel_pmudata_instget(struct gk20a *g,
                         struct nv_pmu_boardobjgrp *pmuboardobjgrp,
                         struct nv_pmu_boardobj **ppboardobjpmudata,
                         u8 idx)
@@ -119,10 +119,10 @@ static u32 _therm_channel_pmudata_instget(struct gk20a *g,
         return 0;
 }
 
-static u32 devinit_get_therm_channel_table(struct gk20a *g,
+static int devinit_get_therm_channel_table(struct gk20a *g,
                                 struct therm_channels *pthermchannelobjs)
 {
-        u32 status = 0;
+        int status = 0;
         u8 *therm_channel_table_ptr = NULL;
         u8 *curr_therm_channel_table_ptr = NULL;
         struct boardobj *boardobj;
@@ -210,9 +210,9 @@ done:
         return status;
 }
 
-u32 therm_channel_sw_setup(struct gk20a *g)
+int therm_channel_sw_setup(struct gk20a *g)
 {
-        u32 status;
+        int status;
         struct boardobjgrp *pboardobjgrp = NULL;
         struct therm_channels *pthermchannelobjs;
 
diff --git a/drivers/gpu/nvgpu/therm/thrmchannel.h b/drivers/gpu/nvgpu/therm/thrmchannel.h
index 4e0dd2e4..a2045c26 100644
--- a/drivers/gpu/nvgpu/therm/thrmchannel.h
+++ b/drivers/gpu/nvgpu/therm/thrmchannel.h
@@ -1,7 +1,7 @@
 /*
  * general thermal device structures & definitions
  *
- * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -46,6 +46,6 @@ struct therm_channel_device {
         u8 therm_dev_prov_idx;
 };
 
-u32 therm_channel_sw_setup(struct gk20a *g);
+int therm_channel_sw_setup(struct gk20a *g);
 
 #endif
diff --git a/drivers/gpu/nvgpu/therm/thrmdev.c b/drivers/gpu/nvgpu/therm/thrmdev.c
index aaf0a461..ddd1f280 100644
--- a/drivers/gpu/nvgpu/therm/thrmdev.c
+++ b/drivers/gpu/nvgpu/therm/thrmdev.c
@@ -30,7 +30,7 @@
 #include "gp106/bios_gp106.h"
 #include "ctrl/ctrltherm.h"
 
-static u32 _therm_device_pmudata_instget(struct gk20a *g,
+static int _therm_device_pmudata_instget(struct gk20a *g,
                         struct nv_pmu_boardobjgrp *pmuboardobjgrp,
                         struct nv_pmu_boardobj **ppboardobjpmudata,
                         u8 idx)
@@ -54,29 +54,29 @@ static u32 _therm_device_pmudata_instget(struct gk20a *g,
         return 0;
 }
 
-static u32 construct_therm_device(struct gk20a *g,
+static int construct_therm_device(struct gk20a *g,
         struct boardobj **ppboardobj, u16 size, void *pargs)
 {
         return boardobj_construct_super(g, ppboardobj, size, pargs);
 }
 
-static u32 construct_therm_device_gpu(struct gk20a *g,
+static int construct_therm_device_gpu(struct gk20a *g,
         struct boardobj **ppboardobj, u16 size, void *pargs)
 {
         return construct_therm_device(g, ppboardobj, size, pargs);
 }
 
-static u32 construct_therm_device_gpu_sci(struct gk20a *g,
+static int construct_therm_device_gpu_sci(struct gk20a *g,
         struct boardobj **ppboardobj, u16 size, void *pargs)
 {
         return construct_therm_device(g, ppboardobj, size, pargs);
 }
 
 
-static u32 therm_device_pmu_data_init_gpu_gpc_tsosc(struct gk20a *g,
+static int therm_device_pmu_data_init_gpu_gpc_tsosc(struct gk20a *g,
         struct boardobj *pboard_obj, struct nv_pmu_boardobj *ppmudata)
 {
-        u32 status = 0;
+        int status = 0;
         struct therm_device_gpu_gpc_tsosc *pdev = NULL;
         struct nv_pmu_therm_therm_device_gpu_gpc_tsosc_boardobj_set *pset;
 
@@ -95,13 +95,13 @@ exit:
         return status;
 }
 
-static u32 construct_therm_device_gpu_tsosc(struct gk20a *g,
+static int construct_therm_device_gpu_tsosc(struct gk20a *g,
         struct boardobj **ppboardobj, u16 size, void *pargs)
 {
         struct therm_device_gpu_gpc_tsosc *pdev = NULL;
         struct therm_device_gpu_gpc_tsosc *ptmp_dev =
                 (struct therm_device_gpu_gpc_tsosc *)pargs;
-        u32 status = 0;
+        int status = 0;
 
         status = construct_therm_device(g, ppboardobj, size, pargs);
         if (status != 0) {
@@ -118,10 +118,10 @@ static u32 construct_therm_device_gpu_tsosc(struct gk20a *g,
         return status;
 }
 
-static u32 therm_device_pmu_data_init_hbm2_site(struct gk20a *g,
+static int therm_device_pmu_data_init_hbm2_site(struct gk20a *g,
         struct boardobj *pboard_obj, struct nv_pmu_boardobj *ppmudata)
 {
-        u32 status = 0;
+        int status = 0;
         struct therm_device_hbm2_site *pdev = NULL;
         struct nv_pmu_therm_therm_device_hbm2_site_boardobj_set *pset;
 
@@ -140,13 +140,13 @@ exit:
         return status;
 }
 
-static u32 construct_therm_device_hbm2_site(struct gk20a *g,
+static int construct_therm_device_hbm2_site(struct gk20a *g,
         struct boardobj **ppboardobj, u16 size, void *pargs)
 {
         struct therm_device_hbm2_site *pdev = NULL;
         struct therm_device_hbm2_site *ptmp_dev =
                 (struct therm_device_hbm2_site *)pargs;
-        u32 status = 0;
+        int status = 0;
 
         status = construct_therm_device(g, ppboardobj, size, pargs);
         if (status != 0) {
@@ -163,7 +163,7 @@ static u32 construct_therm_device_hbm2_site(struct gk20a *g,
         return status;
 }
 
-static u32 construct_therm_device_hbm2_combined(struct gk20a *g,
+static int construct_therm_device_hbm2_combined(struct gk20a *g,
         struct boardobj **ppboardobj, u16 size, void *pargs)
 {
         return construct_therm_device(g, ppboardobj, size, pargs);
@@ -174,7 +174,7 @@ static struct boardobj *therm_device_construct(struct gk20a *g,
         void *pargs)
 {
         struct boardobj *board_obj_ptr = NULL;
-        u32 status = 0;
+        int status = 0;
 
         switch (BOARDOBJ_GET_TYPE(pargs)) {
         case NV_VBIOS_THERM_DEVICE_1X_ENTRY_CLASS_GPU:
@@ -216,10 +216,10 @@ static struct boardobj *therm_device_construct(struct gk20a *g,
         return board_obj_ptr;
 }
 
-static u32 devinit_get_therm_device_table(struct gk20a *g,
+static int devinit_get_therm_device_table(struct gk20a *g,
                                 struct therm_devices *pthermdeviceobjs)
 {
-        u32 status = 0;
+        int status = 0;
         u8 *therm_device_table_ptr = NULL;
         u8 *curr_therm_device_table_ptr = NULL;
         struct boardobj *boardobj;
@@ -324,9 +324,9 @@ done:
         return status;
 }
 
-u32 therm_device_sw_setup(struct gk20a *g)
+int therm_device_sw_setup(struct gk20a *g)
 {
-        u32 status;
+        int status;
         struct boardobjgrp *pboardobjgrp = NULL;
         struct therm_devices *pthermdeviceobjs;
 
diff --git a/drivers/gpu/nvgpu/therm/thrmdev.h b/drivers/gpu/nvgpu/therm/thrmdev.h
index af349c88..df4c199a 100644
--- a/drivers/gpu/nvgpu/therm/thrmdev.h
+++ b/drivers/gpu/nvgpu/therm/thrmdev.h
@@ -1,7 +1,7 @@
 /*
  * general thermal device structures & definitions
  *
- * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -53,6 +53,6 @@ struct therm_device_hbm2_combined {
         struct therm_device super;
 };
 
-u32 therm_device_sw_setup(struct gk20a *g);
+int therm_device_sw_setup(struct gk20a *g);
 
 #endif
diff --git a/drivers/gpu/nvgpu/therm/thrmpmu.c b/drivers/gpu/nvgpu/therm/thrmpmu.c
index 6a79cc3e..7814cf5e 100644
--- a/drivers/gpu/nvgpu/therm/thrmpmu.c
+++ b/drivers/gpu/nvgpu/therm/thrmpmu.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -50,9 +50,9 @@ static void therm_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg,
                 phandlerparams->success = 1;
 }
 
-u32 therm_send_pmgr_tables_to_pmu(struct gk20a *g)
+int therm_send_pmgr_tables_to_pmu(struct gk20a *g)
 {
-        u32 status = 0;
+        int status = 0;
         struct boardobjgrp *pboardobjgrp = NULL;
 
         if (!BOARDOBJGRP_IS_EMPTY(&g->therm_pmu.therm_deviceobjs.super.super)) {
diff --git a/drivers/gpu/nvgpu/therm/thrmpmu.h b/drivers/gpu/nvgpu/therm/thrmpmu.h
index 1813ce6c..1341a055 100644
--- a/drivers/gpu/nvgpu/therm/thrmpmu.h
+++ b/drivers/gpu/nvgpu/therm/thrmpmu.h
@@ -1,7 +1,7 @@
 /*
  * general thermal pmu control structures & definitions
  *
- * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -24,7 +24,7 @@
 #ifndef _THRMPMU_H_
 #define _THRMPMU_H_
 
-u32 therm_send_pmgr_tables_to_pmu(struct gk20a *g);
+int therm_send_pmgr_tables_to_pmu(struct gk20a *g);
 
 u32 therm_configure_therm_alert(struct gk20a *g);