diff options
author | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 05:01:00 -0500 |
---|---|---|
committer | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 05:35:06 -0500 |
commit | 7a81883a0d70c3a43ad2841ac235f6dc344c60fb (patch) | |
tree | 92923d2efccf90d1961071fa9acde59178a0d688 /drivers/gpu/nvgpu/therm | |
parent | 505b442551a2e27aa3bc9e608c5a2bc9fccecbc4 (diff) | |
parent | 2aa3c85f8e82b3c07c39e677663abd3687c1822a (diff) |
Merge remote-tracking branch 'remotes/origin/dev/merge-nvgpu-t18x-into-nvgpu' into dev-kernel
Merge T186 - gp10b/gp106 code into common nvgpu repo
Bug 200266498
Change-Id: Ibf100ee38010cbed85c149b69b99147256f9a005
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/therm')
-rw-r--r-- | drivers/gpu/nvgpu/therm/thrm.c | 45 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/therm/thrm.h | 29 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/therm/thrmchannel.c | 246 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/therm/thrmchannel.h | 42 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/therm/thrmdev.c | 193 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/therm/thrmdev.h | 31 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/therm/thrmpmu.c | 142 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/therm/thrmpmu.h | 22 |
8 files changed, 750 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/therm/thrm.c b/drivers/gpu/nvgpu/therm/thrm.c new file mode 100644 index 00000000..731cf89e --- /dev/null +++ b/drivers/gpu/nvgpu/therm/thrm.c | |||
@@ -0,0 +1,45 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | */ | ||
13 | |||
14 | #include "gk20a/gk20a.h" | ||
15 | #include "thrm.h" | ||
16 | #include "thrmpmu.h" | ||
17 | |||
18 | u32 therm_domain_sw_setup(struct gk20a *g) | ||
19 | { | ||
20 | u32 status; | ||
21 | |||
22 | status = therm_device_sw_setup(g); | ||
23 | if (status) { | ||
24 | gk20a_err(dev_from_gk20a(g), | ||
25 | "error creating boardobjgrp for therm devices, status - 0x%x", | ||
26 | status); | ||
27 | goto exit; | ||
28 | } | ||
29 | |||
30 | status = therm_channel_sw_setup(g); | ||
31 | if (status) { | ||
32 | gk20a_err(dev_from_gk20a(g), | ||
33 | "error creating boardobjgrp for therm channel, status - 0x%x", | ||
34 | status); | ||
35 | goto exit; | ||
36 | } | ||
37 | |||
38 | exit: | ||
39 | return status; | ||
40 | } | ||
41 | |||
42 | u32 therm_domain_pmu_setup(struct gk20a *g) | ||
43 | { | ||
44 | return therm_send_pmgr_tables_to_pmu(g); | ||
45 | } | ||
diff --git a/drivers/gpu/nvgpu/therm/thrm.h b/drivers/gpu/nvgpu/therm/thrm.h new file mode 100644 index 00000000..1db93b49 --- /dev/null +++ b/drivers/gpu/nvgpu/therm/thrm.h | |||
@@ -0,0 +1,29 @@ | |||
1 | /* | ||
2 | * general thermal table structures & definitions | ||
3 | * | ||
4 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms and conditions of the GNU General Public License, | ||
8 | * version 2, as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | * more details. | ||
14 | */ | ||
15 | #ifndef _THRM_H_ | ||
16 | #define _THRM_H_ | ||
17 | |||
18 | #include "thrmdev.h" | ||
19 | #include "thrmchannel.h" | ||
20 | |||
21 | struct therm_pmupstate { | ||
22 | struct therm_devices therm_deviceobjs; | ||
23 | struct therm_channels therm_channelobjs; | ||
24 | }; | ||
25 | |||
26 | u32 therm_domain_sw_setup(struct gk20a *g); | ||
27 | u32 therm_domain_pmu_setup(struct gk20a *g); | ||
28 | |||
29 | #endif | ||
diff --git a/drivers/gpu/nvgpu/therm/thrmchannel.c b/drivers/gpu/nvgpu/therm/thrmchannel.c new file mode 100644 index 00000000..b5a7dfd2 --- /dev/null +++ b/drivers/gpu/nvgpu/therm/thrmchannel.c | |||
@@ -0,0 +1,246 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | */ | ||
13 | |||
14 | #include "gk20a/gk20a.h" | ||
15 | #include "thrmchannel.h" | ||
16 | #include "include/bios.h" | ||
17 | #include "boardobj/boardobjgrp.h" | ||
18 | #include "boardobj/boardobjgrp_e32.h" | ||
19 | #include "pmuif/gpmuifboardobj.h" | ||
20 | #include "pmuif/gpmuifthermsensor.h" | ||
21 | #include "gm206/bios_gm206.h" | ||
22 | #include "gk20a/pmu_gk20a.h" | ||
23 | |||
24 | static u32 _therm_channel_pmudatainit_device(struct gk20a *g, | ||
25 | struct boardobj *board_obj_ptr, | ||
26 | struct nv_pmu_boardobj *ppmudata) | ||
27 | { | ||
28 | u32 status = 0; | ||
29 | struct therm_channel *pchannel; | ||
30 | struct therm_channel_device *ptherm_channel; | ||
31 | struct nv_pmu_therm_therm_channel_device_boardobj_set *pset; | ||
32 | |||
33 | status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata); | ||
34 | if (status) { | ||
35 | gk20a_err(dev_from_gk20a(g), | ||
36 | "error updating pmu boardobjgrp for therm channel 0x%x", | ||
37 | status); | ||
38 | status = -ENOMEM; | ||
39 | goto done; | ||
40 | } | ||
41 | |||
42 | pchannel = (struct therm_channel *)board_obj_ptr; | ||
43 | pset = (struct nv_pmu_therm_therm_channel_device_boardobj_set *)ppmudata; | ||
44 | ptherm_channel = (struct therm_channel_device *)board_obj_ptr; | ||
45 | |||
46 | pset->super.scaling = pchannel->scaling; | ||
47 | pset->super.offset = pchannel->offset; | ||
48 | pset->super.temp_min = pchannel->temp_min; | ||
49 | pset->super.temp_max = pchannel->temp_max; | ||
50 | |||
51 | pset->therm_dev_idx = ptherm_channel->therm_dev_idx; | ||
52 | pset->therm_dev_prov_idx = ptherm_channel->therm_dev_prov_idx; | ||
53 | |||
54 | done: | ||
55 | return status; | ||
56 | } | ||
57 | static struct boardobj *construct_channel_device(struct gk20a *g, | ||
58 | void *pargs, u16 pargs_size, u8 type) | ||
59 | { | ||
60 | struct boardobj *board_obj_ptr = NULL; | ||
61 | struct therm_channel *pchannel; | ||
62 | struct therm_channel_device *pchannel_device; | ||
63 | u32 status; | ||
64 | struct therm_channel_device *therm_device = (struct therm_channel_device*)pargs; | ||
65 | |||
66 | status = boardobj_construct_super(g, &board_obj_ptr, | ||
67 | pargs_size, pargs); | ||
68 | if (status) | ||
69 | return NULL; | ||
70 | |||
71 | /* Set Super class interfaces */ | ||
72 | board_obj_ptr->pmudatainit = _therm_channel_pmudatainit_device; | ||
73 | |||
74 | pchannel = (struct therm_channel *)board_obj_ptr; | ||
75 | pchannel_device = (struct therm_channel_device *)board_obj_ptr; | ||
76 | |||
77 | g->ops.therm.get_internal_sensor_limits(&pchannel->temp_max, | ||
78 | &pchannel->temp_min); | ||
79 | pchannel->scaling = (1 << 8); | ||
80 | pchannel->offset = 0; | ||
81 | |||
82 | pchannel_device->therm_dev_idx = therm_device->therm_dev_idx; | ||
83 | pchannel_device->therm_dev_prov_idx = therm_device->therm_dev_prov_idx; | ||
84 | |||
85 | gk20a_dbg_info(" Done"); | ||
86 | |||
87 | return board_obj_ptr; | ||
88 | } | ||
89 | |||
90 | static u32 _therm_channel_pmudata_instget(struct gk20a *g, | ||
91 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, | ||
92 | struct nv_pmu_boardobj **ppboardobjpmudata, | ||
93 | u8 idx) | ||
94 | { | ||
95 | struct nv_pmu_therm_therm_channel_boardobj_grp_set *pgrp_set = | ||
96 | (struct nv_pmu_therm_therm_channel_boardobj_grp_set *) | ||
97 | pmuboardobjgrp; | ||
98 | |||
99 | gk20a_dbg_info(""); | ||
100 | |||
101 | /*check whether pmuboardobjgrp has a valid boardobj in index*/ | ||
102 | if (((u32)BIT(idx) & | ||
103 | pgrp_set->hdr.data.super.obj_mask.super.data[0]) == 0) | ||
104 | return -EINVAL; | ||
105 | |||
106 | *ppboardobjpmudata = (struct nv_pmu_boardobj *) | ||
107 | &pgrp_set->objects[idx].data.board_obj; | ||
108 | |||
109 | gk20a_dbg_info(" Done"); | ||
110 | |||
111 | return 0; | ||
112 | } | ||
113 | |||
114 | static u32 devinit_get_therm_channel_table(struct gk20a *g, | ||
115 | struct therm_channels *pthermchannelobjs) | ||
116 | { | ||
117 | u32 status = 0; | ||
118 | u8 *therm_channel_table_ptr = NULL; | ||
119 | u8 *curr_therm_channel_table_ptr = NULL; | ||
120 | struct boardobj *boardobj; | ||
121 | struct therm_channel_1x_header therm_channel_table_header = { 0 }; | ||
122 | struct therm_channel_1x_entry *therm_channel_table_entry = NULL; | ||
123 | u32 index; | ||
124 | u32 obj_index = 0; | ||
125 | u16 therm_channel_size = 0; | ||
126 | union { | ||
127 | struct boardobj boardobj; | ||
128 | struct therm_channel therm_channel; | ||
129 | struct therm_channel_device device; | ||
130 | } therm_channel_data; | ||
131 | |||
132 | gk20a_dbg_info(""); | ||
133 | |||
134 | if (g->ops.bios.get_perf_table_ptrs) { | ||
135 | therm_channel_table_ptr = (u8 *)g->ops.bios.get_perf_table_ptrs(g, | ||
136 | g->bios.perf_token, THERMAL_CHANNEL_TABLE); | ||
137 | if (therm_channel_table_ptr == NULL) { | ||
138 | status = -EINVAL; | ||
139 | goto done; | ||
140 | } | ||
141 | } | ||
142 | |||
143 | memcpy(&therm_channel_table_header, therm_channel_table_ptr, | ||
144 | VBIOS_THERM_CHANNEL_1X_HEADER_SIZE_09); | ||
145 | |||
146 | if (therm_channel_table_header.version != | ||
147 | VBIOS_THERM_CHANNEL_VERSION_1X) { | ||
148 | status = -EINVAL; | ||
149 | goto done; | ||
150 | } | ||
151 | |||
152 | if (therm_channel_table_header.header_size < | ||
153 | VBIOS_THERM_CHANNEL_1X_HEADER_SIZE_09) { | ||
154 | status = -EINVAL; | ||
155 | goto done; | ||
156 | } | ||
157 | |||
158 | curr_therm_channel_table_ptr = (therm_channel_table_ptr + | ||
159 | VBIOS_THERM_CHANNEL_1X_HEADER_SIZE_09); | ||
160 | |||
161 | for (index = 0; index < therm_channel_table_header.num_table_entries; | ||
162 | index++) { | ||
163 | therm_channel_table_entry = (struct therm_channel_1x_entry *) | ||
164 | (curr_therm_channel_table_ptr + | ||
165 | (therm_channel_table_header.table_entry_size * index)); | ||
166 | |||
167 | if (therm_channel_table_entry->class_id != | ||
168 | NV_VBIOS_THERM_CHANNEL_1X_ENTRY_CLASS_DEVICE) { | ||
169 | continue; | ||
170 | } | ||
171 | |||
172 | therm_channel_data.device.therm_dev_idx = therm_channel_table_entry->param0; | ||
173 | therm_channel_data.device.therm_dev_prov_idx = therm_channel_table_entry->param1; | ||
174 | |||
175 | therm_channel_size = sizeof(struct therm_channel_device); | ||
176 | therm_channel_data.boardobj.type = CTRL_THERMAL_THERM_CHANNEL_CLASS_DEVICE; | ||
177 | |||
178 | boardobj = construct_channel_device(g, &therm_channel_data, | ||
179 | therm_channel_size, therm_channel_data.boardobj.type); | ||
180 | |||
181 | if (!boardobj) { | ||
182 | gk20a_err(dev_from_gk20a(g), | ||
183 | "unable to create thermal device for %d type %d", | ||
184 | index, therm_channel_data.boardobj.type); | ||
185 | status = -EINVAL; | ||
186 | goto done; | ||
187 | } | ||
188 | |||
189 | status = boardobjgrp_objinsert(&pthermchannelobjs->super.super, | ||
190 | boardobj, obj_index); | ||
191 | |||
192 | if (status) { | ||
193 | gk20a_err(dev_from_gk20a(g), | ||
194 | "unable to insert thermal device boardobj for %d", index); | ||
195 | status = -EINVAL; | ||
196 | goto done; | ||
197 | } | ||
198 | |||
199 | ++obj_index; | ||
200 | } | ||
201 | |||
202 | done: | ||
203 | gk20a_dbg_info(" done status %x", status); | ||
204 | return status; | ||
205 | } | ||
206 | |||
207 | u32 therm_channel_sw_setup(struct gk20a *g) | ||
208 | { | ||
209 | u32 status; | ||
210 | struct boardobjgrp *pboardobjgrp = NULL; | ||
211 | struct therm_channels *pthermchannelobjs; | ||
212 | |||
213 | /* Construct the Super Class and override the Interfaces */ | ||
214 | status = boardobjgrpconstruct_e32(&g->therm_pmu.therm_channelobjs.super); | ||
215 | if (status) { | ||
216 | gk20a_err(dev_from_gk20a(g), | ||
217 | "error creating boardobjgrp for therm devices, status - 0x%x", | ||
218 | status); | ||
219 | goto done; | ||
220 | } | ||
221 | |||
222 | pboardobjgrp = &g->therm_pmu.therm_channelobjs.super.super; | ||
223 | pthermchannelobjs = &(g->therm_pmu.therm_channelobjs); | ||
224 | |||
225 | /* Override the Interfaces */ | ||
226 | pboardobjgrp->pmudatainstget = _therm_channel_pmudata_instget; | ||
227 | |||
228 | status = devinit_get_therm_channel_table(g, pthermchannelobjs); | ||
229 | if (status) | ||
230 | goto done; | ||
231 | |||
232 | BOARDOBJGRP_PMU_CONSTRUCT(pboardobjgrp, THERM, THERM_CHANNEL); | ||
233 | |||
234 | status = BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp, | ||
235 | therm, THERM, therm_channel, THERM_CHANNEL); | ||
236 | if (status) { | ||
237 | gk20a_err(dev_from_gk20a(g), | ||
238 | "error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x", | ||
239 | status); | ||
240 | goto done; | ||
241 | } | ||
242 | |||
243 | done: | ||
244 | gk20a_dbg_info(" done status %x", status); | ||
245 | return status; | ||
246 | } | ||
diff --git a/drivers/gpu/nvgpu/therm/thrmchannel.h b/drivers/gpu/nvgpu/therm/thrmchannel.h new file mode 100644 index 00000000..4b9d19da --- /dev/null +++ b/drivers/gpu/nvgpu/therm/thrmchannel.h | |||
@@ -0,0 +1,42 @@ | |||
1 | /* | ||
2 | * general thermal device structures & definitions | ||
3 | * | ||
4 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms and conditions of the GNU General Public License, | ||
8 | * version 2, as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | * more details. | ||
14 | */ | ||
15 | #ifndef _THRMCHANNEL_H_ | ||
16 | #define _THRMCHANNEL_H_ | ||
17 | |||
18 | #include "boardobj/boardobj.h" | ||
19 | #include "boardobj/boardobjgrp.h" | ||
20 | #include "ctrl/ctrltherm.h" | ||
21 | |||
22 | struct therm_channel { | ||
23 | struct boardobj super; | ||
24 | s16 scaling; | ||
25 | s16 offset; | ||
26 | s32 temp_min; | ||
27 | s32 temp_max; | ||
28 | }; | ||
29 | |||
30 | struct therm_channels { | ||
31 | struct boardobjgrp_e32 super; | ||
32 | }; | ||
33 | |||
34 | struct therm_channel_device { | ||
35 | struct therm_channel super; | ||
36 | u8 therm_dev_idx; | ||
37 | u8 therm_dev_prov_idx; | ||
38 | }; | ||
39 | |||
40 | u32 therm_channel_sw_setup(struct gk20a *g); | ||
41 | |||
42 | #endif | ||
diff --git a/drivers/gpu/nvgpu/therm/thrmdev.c b/drivers/gpu/nvgpu/therm/thrmdev.c new file mode 100644 index 00000000..83ac9739 --- /dev/null +++ b/drivers/gpu/nvgpu/therm/thrmdev.c | |||
@@ -0,0 +1,193 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | */ | ||
13 | |||
14 | #include "gk20a/gk20a.h" | ||
15 | #include "thrmdev.h" | ||
16 | #include "include/bios.h" | ||
17 | #include "boardobj/boardobjgrp.h" | ||
18 | #include "boardobj/boardobjgrp_e32.h" | ||
19 | #include "pmuif/gpmuifboardobj.h" | ||
20 | #include "pmuif/gpmuifthermsensor.h" | ||
21 | #include "gm206/bios_gm206.h" | ||
22 | #include "gk20a/pmu_gk20a.h" | ||
23 | #include "ctrl/ctrltherm.h" | ||
24 | |||
25 | static struct boardobj *construct_therm_device(struct gk20a *g, | ||
26 | void *pargs, u16 pargs_size, u8 type) | ||
27 | { | ||
28 | struct boardobj *board_obj_ptr = NULL; | ||
29 | u32 status; | ||
30 | |||
31 | status = boardobj_construct_super(g, &board_obj_ptr, | ||
32 | pargs_size, pargs); | ||
33 | if (status) | ||
34 | return NULL; | ||
35 | |||
36 | gk20a_dbg_info(" Done"); | ||
37 | |||
38 | return board_obj_ptr; | ||
39 | } | ||
40 | |||
41 | static u32 _therm_device_pmudata_instget(struct gk20a *g, | ||
42 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, | ||
43 | struct nv_pmu_boardobj **ppboardobjpmudata, | ||
44 | u8 idx) | ||
45 | { | ||
46 | struct nv_pmu_therm_therm_device_boardobj_grp_set *pgrp_set = | ||
47 | (struct nv_pmu_therm_therm_device_boardobj_grp_set *) | ||
48 | pmuboardobjgrp; | ||
49 | |||
50 | gk20a_dbg_info(""); | ||
51 | |||
52 | /*check whether pmuboardobjgrp has a valid boardobj in index*/ | ||
53 | if (((u32)BIT(idx) & | ||
54 | pgrp_set->hdr.data.super.obj_mask.super.data[0]) == 0) | ||
55 | return -EINVAL; | ||
56 | |||
57 | *ppboardobjpmudata = (struct nv_pmu_boardobj *) | ||
58 | &pgrp_set->objects[idx].data; | ||
59 | |||
60 | gk20a_dbg_info(" Done"); | ||
61 | |||
62 | return 0; | ||
63 | } | ||
64 | |||
65 | static u32 devinit_get_therm_device_table(struct gk20a *g, | ||
66 | struct therm_devices *pthermdeviceobjs) | ||
67 | { | ||
68 | u32 status = 0; | ||
69 | u8 *therm_device_table_ptr = NULL; | ||
70 | u8 *curr_therm_device_table_ptr = NULL; | ||
71 | struct boardobj *boardobj; | ||
72 | struct therm_device_1x_header therm_device_table_header = { 0 }; | ||
73 | struct therm_device_1x_entry *therm_device_table_entry = NULL; | ||
74 | u32 index; | ||
75 | u32 obj_index = 0; | ||
76 | u16 therm_device_size = 0; | ||
77 | union { | ||
78 | struct boardobj boardobj; | ||
79 | struct therm_device therm_device; | ||
80 | } therm_device_data; | ||
81 | |||
82 | gk20a_dbg_info(""); | ||
83 | |||
84 | if (g->ops.bios.get_perf_table_ptrs) { | ||
85 | therm_device_table_ptr = (u8 *)g->ops.bios.get_perf_table_ptrs(g, | ||
86 | g->bios.perf_token, THERMAL_DEVICE_TABLE); | ||
87 | if (therm_device_table_ptr == NULL) { | ||
88 | status = -EINVAL; | ||
89 | goto done; | ||
90 | } | ||
91 | } | ||
92 | |||
93 | memcpy(&therm_device_table_header, therm_device_table_ptr, | ||
94 | VBIOS_THERM_DEVICE_1X_HEADER_SIZE_04); | ||
95 | |||
96 | if (therm_device_table_header.version != | ||
97 | VBIOS_THERM_DEVICE_VERSION_1X) { | ||
98 | status = -EINVAL; | ||
99 | goto done; | ||
100 | } | ||
101 | |||
102 | if (therm_device_table_header.header_size < | ||
103 | VBIOS_THERM_DEVICE_1X_HEADER_SIZE_04) { | ||
104 | status = -EINVAL; | ||
105 | goto done; | ||
106 | } | ||
107 | |||
108 | curr_therm_device_table_ptr = (therm_device_table_ptr + | ||
109 | VBIOS_THERM_DEVICE_1X_HEADER_SIZE_04); | ||
110 | |||
111 | for (index = 0; index < therm_device_table_header.num_table_entries; | ||
112 | index++) { | ||
113 | therm_device_table_entry = (struct therm_device_1x_entry *) | ||
114 | (curr_therm_device_table_ptr + | ||
115 | (therm_device_table_header.table_entry_size * index)); | ||
116 | |||
117 | if (therm_device_table_entry->class_id != | ||
118 | NV_VBIOS_THERM_DEVICE_1X_ENTRY_CLASS_GPU) { | ||
119 | continue; | ||
120 | } | ||
121 | |||
122 | therm_device_size = sizeof(struct therm_device); | ||
123 | therm_device_data.boardobj.type = CTRL_THERMAL_THERM_DEVICE_CLASS_GPU; | ||
124 | |||
125 | boardobj = construct_therm_device(g, &therm_device_data, | ||
126 | therm_device_size, therm_device_data.boardobj.type); | ||
127 | |||
128 | if (!boardobj) { | ||
129 | gk20a_err(dev_from_gk20a(g), | ||
130 | "unable to create thermal device for %d type %d", | ||
131 | index, therm_device_data.boardobj.type); | ||
132 | status = -EINVAL; | ||
133 | goto done; | ||
134 | } | ||
135 | |||
136 | status = boardobjgrp_objinsert(&pthermdeviceobjs->super.super, | ||
137 | boardobj, obj_index); | ||
138 | |||
139 | if (status) { | ||
140 | gk20a_err(dev_from_gk20a(g), | ||
141 | "unable to insert thermal device boardobj for %d", index); | ||
142 | status = -EINVAL; | ||
143 | goto done; | ||
144 | } | ||
145 | |||
146 | ++obj_index; | ||
147 | } | ||
148 | |||
149 | done: | ||
150 | gk20a_dbg_info(" done status %x", status); | ||
151 | return status; | ||
152 | } | ||
153 | |||
154 | u32 therm_device_sw_setup(struct gk20a *g) | ||
155 | { | ||
156 | u32 status; | ||
157 | struct boardobjgrp *pboardobjgrp = NULL; | ||
158 | struct therm_devices *pthermdeviceobjs; | ||
159 | |||
160 | /* Construct the Super Class and override the Interfaces */ | ||
161 | status = boardobjgrpconstruct_e32(&g->therm_pmu.therm_deviceobjs.super); | ||
162 | if (status) { | ||
163 | gk20a_err(dev_from_gk20a(g), | ||
164 | "error creating boardobjgrp for therm devices, status - 0x%x", | ||
165 | status); | ||
166 | goto done; | ||
167 | } | ||
168 | |||
169 | pboardobjgrp = &g->therm_pmu.therm_deviceobjs.super.super; | ||
170 | pthermdeviceobjs = &(g->therm_pmu.therm_deviceobjs); | ||
171 | |||
172 | /* Override the Interfaces */ | ||
173 | pboardobjgrp->pmudatainstget = _therm_device_pmudata_instget; | ||
174 | |||
175 | status = devinit_get_therm_device_table(g, pthermdeviceobjs); | ||
176 | if (status) | ||
177 | goto done; | ||
178 | |||
179 | BOARDOBJGRP_PMU_CONSTRUCT(pboardobjgrp, THERM, THERM_DEVICE); | ||
180 | |||
181 | status = BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp, | ||
182 | therm, THERM, therm_device, THERM_DEVICE); | ||
183 | if (status) { | ||
184 | gk20a_err(dev_from_gk20a(g), | ||
185 | "error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x", | ||
186 | status); | ||
187 | goto done; | ||
188 | } | ||
189 | |||
190 | done: | ||
191 | gk20a_dbg_info(" done status %x", status); | ||
192 | return status; | ||
193 | } | ||
diff --git a/drivers/gpu/nvgpu/therm/thrmdev.h b/drivers/gpu/nvgpu/therm/thrmdev.h new file mode 100644 index 00000000..35be47c0 --- /dev/null +++ b/drivers/gpu/nvgpu/therm/thrmdev.h | |||
@@ -0,0 +1,31 @@ | |||
1 | /* | ||
2 | * general thermal device structures & definitions | ||
3 | * | ||
4 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms and conditions of the GNU General Public License, | ||
8 | * version 2, as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | * more details. | ||
14 | */ | ||
15 | #ifndef _THRMDEV_H_ | ||
16 | #define _THRMDEV_H_ | ||
17 | |||
18 | #include "boardobj/boardobj.h" | ||
19 | #include "boardobj/boardobjgrp.h" | ||
20 | |||
21 | struct therm_devices { | ||
22 | struct boardobjgrp_e32 super; | ||
23 | }; | ||
24 | |||
25 | struct therm_device { | ||
26 | struct therm_devices super; | ||
27 | }; | ||
28 | |||
29 | u32 therm_device_sw_setup(struct gk20a *g); | ||
30 | |||
31 | #endif | ||
diff --git a/drivers/gpu/nvgpu/therm/thrmpmu.c b/drivers/gpu/nvgpu/therm/thrmpmu.c new file mode 100644 index 00000000..0d0a4b3a --- /dev/null +++ b/drivers/gpu/nvgpu/therm/thrmpmu.c | |||
@@ -0,0 +1,142 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | */ | ||
13 | |||
14 | #include "gk20a/gk20a.h" | ||
15 | #include "include/bios.h" | ||
16 | #include "boardobj/boardobjgrp.h" | ||
17 | #include "boardobj/boardobjgrp_e32.h" | ||
18 | #include "pmuif/gpmuifboardobj.h" | ||
19 | #include "thrmpmu.h" | ||
20 | #include "pmuif/gpmuiftherm.h" | ||
21 | |||
22 | struct therm_pmucmdhandler_params { | ||
23 | struct nv_pmu_therm_rpc *prpccall; | ||
24 | u32 success; | ||
25 | }; | ||
26 | |||
27 | static void therm_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg, | ||
28 | void *param, u32 handle, u32 status) | ||
29 | { | ||
30 | struct therm_pmucmdhandler_params *phandlerparams = | ||
31 | (struct therm_pmucmdhandler_params *)param; | ||
32 | |||
33 | if (msg->msg.therm.msg_type != NV_PMU_THERM_MSG_ID_RPC) { | ||
34 | gk20a_err(dev_from_gk20a(g), | ||
35 | "unknow msg %x", | ||
36 | msg->msg.pmgr.msg_type); | ||
37 | return; | ||
38 | } | ||
39 | |||
40 | if (!phandlerparams->prpccall->b_supported) | ||
41 | gk20a_err(dev_from_gk20a(g), | ||
42 | "RPC msg %x failed", | ||
43 | msg->msg.pmgr.msg_type); | ||
44 | else | ||
45 | phandlerparams->success = 1; | ||
46 | } | ||
47 | |||
48 | u32 therm_send_pmgr_tables_to_pmu(struct gk20a *g) | ||
49 | { | ||
50 | u32 status = 0; | ||
51 | struct boardobjgrp *pboardobjgrp = NULL; | ||
52 | |||
53 | if (!BOARDOBJGRP_IS_EMPTY(&g->therm_pmu.therm_deviceobjs.super.super)) { | ||
54 | pboardobjgrp = &g->therm_pmu.therm_deviceobjs.super.super; | ||
55 | status = pboardobjgrp->pmuinithandle(g, pboardobjgrp); | ||
56 | if (status) { | ||
57 | gk20a_err(dev_from_gk20a(g), | ||
58 | "therm_send_pmgr_tables_to_pmu - therm_device failed %x", | ||
59 | status); | ||
60 | goto exit; | ||
61 | } | ||
62 | } | ||
63 | |||
64 | if (!BOARDOBJGRP_IS_EMPTY( | ||
65 | &g->therm_pmu.therm_channelobjs.super.super)) { | ||
66 | pboardobjgrp = &g->therm_pmu.therm_channelobjs.super.super; | ||
67 | status = pboardobjgrp->pmuinithandle(g, pboardobjgrp); | ||
68 | if (status) { | ||
69 | gk20a_err(dev_from_gk20a(g), | ||
70 | "therm_send_pmgr_tables_to_pmu - therm_channel failed %x", | ||
71 | status); | ||
72 | goto exit; | ||
73 | } | ||
74 | } | ||
75 | |||
76 | exit: | ||
77 | return status; | ||
78 | } | ||
79 | |||
80 | u32 therm_set_warn_temp_limit(struct gk20a *g) | ||
81 | { | ||
82 | u32 status; | ||
83 | u32 seqdesc = 0; | ||
84 | struct pmu_cmd cmd = { {0} }; | ||
85 | struct pmu_msg msg = { {0} }; | ||
86 | struct pmu_payload payload = { {0} }; | ||
87 | struct nv_pmu_therm_rpc rpccall = {0}; | ||
88 | struct therm_pmucmdhandler_params handlerparams = {0}; | ||
89 | |||
90 | rpccall.function = NV_PMU_THERM_RPC_ID_SLCT_EVENT_TEMP_TH_SET; | ||
91 | rpccall.params.slct_event_temp_th_set.event_id = | ||
92 | NV_PMU_THERM_EVENT_THERMAL_1; | ||
93 | rpccall.params.slct_event_temp_th_set.temp_threshold = g->curr_warn_temp; | ||
94 | rpccall.b_supported = 0; | ||
95 | |||
96 | cmd.hdr.unit_id = PMU_UNIT_THERM; | ||
97 | cmd.hdr.size = ((u32)sizeof(struct nv_pmu_therm_cmd) + | ||
98 | (u32)sizeof(struct pmu_hdr)); | ||
99 | cmd.cmd.therm.cmd_type = NV_PMU_THERM_CMD_ID_RPC; | ||
100 | |||
101 | msg.hdr.size = sizeof(struct pmu_msg); | ||
102 | |||
103 | payload.in.buf = (u8 *)&rpccall; | ||
104 | payload.in.size = (u32)sizeof(struct nv_pmu_therm_rpc); | ||
105 | payload.in.fb_size = PMU_CMD_SUBMIT_PAYLOAD_PARAMS_FB_SIZE_UNUSED; | ||
106 | payload.in.offset = NV_PMU_THERM_CMD_RPC_ALLOC_OFFSET; | ||
107 | |||
108 | payload.out.buf = (u8 *)&rpccall; | ||
109 | payload.out.size = (u32)sizeof(struct nv_pmu_therm_rpc); | ||
110 | payload.out.fb_size = PMU_CMD_SUBMIT_PAYLOAD_PARAMS_FB_SIZE_UNUSED; | ||
111 | payload.out.offset = NV_PMU_CLK_MSG_RPC_ALLOC_OFFSET; | ||
112 | |||
113 | /* Setup the handler params to communicate back results.*/ | ||
114 | handlerparams.success = 0; | ||
115 | handlerparams.prpccall = &rpccall; | ||
116 | |||
117 | status = gk20a_pmu_cmd_post(g, &cmd, NULL, &payload, | ||
118 | PMU_COMMAND_QUEUE_LPQ, | ||
119 | therm_pmucmdhandler, | ||
120 | (void *)&handlerparams, | ||
121 | &seqdesc, ~0); | ||
122 | if (status) { | ||
123 | gk20a_err(dev_from_gk20a(g), | ||
124 | "unable to post pmgr cmd for unit %x cmd id %x size %x", | ||
125 | cmd.hdr.unit_id, cmd.cmd.therm.cmd_type, cmd.hdr.size); | ||
126 | goto exit; | ||
127 | } | ||
128 | |||
129 | pmu_wait_message_cond(&g->pmu, | ||
130 | gk20a_get_gr_idle_timeout(g), | ||
131 | &handlerparams.success, 1); | ||
132 | |||
133 | if (handlerparams.success == 0) { | ||
134 | gk20a_err(dev_from_gk20a(g), "could not process cmd\n"); | ||
135 | status = -ETIMEDOUT; | ||
136 | goto exit; | ||
137 | } | ||
138 | |||
139 | exit: | ||
140 | return status; | ||
141 | } | ||
142 | |||
diff --git a/drivers/gpu/nvgpu/therm/thrmpmu.h b/drivers/gpu/nvgpu/therm/thrmpmu.h new file mode 100644 index 00000000..e6f70411 --- /dev/null +++ b/drivers/gpu/nvgpu/therm/thrmpmu.h | |||
@@ -0,0 +1,22 @@ | |||
1 | /* | ||
2 | * general thermal pmu control structures & definitions | ||
3 | * | ||
4 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms and conditions of the GNU General Public License, | ||
8 | * version 2, as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | * more details. | ||
14 | */ | ||
15 | #ifndef _THRMPMU_H_ | ||
16 | #define _THRMPMU_H_ | ||
17 | |||
18 | u32 therm_send_pmgr_tables_to_pmu(struct gk20a *g); | ||
19 | |||
20 | u32 therm_set_warn_temp_limit(struct gk20a *g); | ||
21 | |||
22 | #endif | ||