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authorTerje Bergstrom <tbergstrom@nvidia.com>2017-05-01 18:31:00 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-05-12 13:19:52 -0400
commita8cf64019f74dd05626a911af3df079efd9c7c89 (patch)
treeb88b450a989a13cb4cbd0f831cd7add30c4ef0c4 /drivers/gpu/nvgpu/therm/thrmdev.c
parent5a4926f2918b84fccefb8ddf6dbaa7b6449735bf (diff)
gpu: nvgpu: Introduce priv ring HAL and define ISR
Introduce a priv ring HAL and define ISR as the only function in it. Introduce a gp10b version of the ISR that writes error message to UART for every priv ring error, and leave the old chips with silent error handling. Bug 1846641 Change-Id: I73e38396205ac7bb7b8488b7fbca3ff67a3db3bb Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1473696 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/therm/thrmdev.c')
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