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authorTerje Bergstrom <tbergstrom@nvidia.com>2017-05-01 21:32:46 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-05-03 15:16:24 -0400
commite2148ead8bbf51c2dbf9e2b501c989f2c27582a0 (patch)
tree2124f62df3dd52478f70b4309a00e6661ad6dc43 /drivers/gpu/nvgpu/therm/thrmchannel.c
parentb3c3ffcbfba99628f033b36e53d8dfc4a5ccd7b9 (diff)
gpu: nvgpu: Program CE clock gating list after reset
Clock gating list for CE was programmed at GR init, but at that time CE has not yet been brought out of reset. This causes a priv ring error and the clock gating setting does not take place. Move programming of CE clock gating list to CE initialization. Bug 1846641 Change-Id: Ibc9fe2487408358304f80cd679d3b1ecac7cebe8 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1473301 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/therm/thrmchannel.c')
0 files changed, 0 insertions, 0 deletions