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authorPhilip Elcan <pelcan@nvidia.com>2018-08-27 12:45:27 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-09-10 18:23:45 -0400
commitd2be65315a9ebfc88e77489571a31c48b3d21284 (patch)
treeff4a2d2d90ad1b6f3768bcb8e67176202ccfe97c /drivers/gpu/nvgpu/pstate
parentc86f185d1022de18a1a1073aa91d2b06aa59e2fc (diff)
gpu: nvgpu: fix some MISRA 10.3 violations
Fix MISRA 10.3 violations in mclk_gp106.c. Cleanup cases where values were being assigned to narrower types. Changes in mclk_gp106.c required updates to other files to resolve errors and prevent introducing new violations. JIRA NVGPU-647 Change-Id: Ifdb03ad41d9dbf05dbcf79494ae8565fff6ee083 Signed-off-by: Philip Elcan <pelcan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1809366 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/pstate')
-rw-r--r--drivers/gpu/nvgpu/pstate/pstate.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/pstate/pstate.h b/drivers/gpu/nvgpu/pstate/pstate.h
index 55726d55..0860b46e 100644
--- a/drivers/gpu/nvgpu/pstate/pstate.h
+++ b/drivers/gpu/nvgpu/pstate/pstate.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * general p state infrastructure 2 * general p state infrastructure
3 * 3 *
4 * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
5 * 5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a 6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"), 7 * copy of this software and associated documentation files (the "Software"),
@@ -39,8 +39,8 @@ struct gk20a;
39struct clk_set_info { 39struct clk_set_info {
40 enum nv_pmu_clk_clkwhich clkwhich; 40 enum nv_pmu_clk_clkwhich clkwhich;
41 u32 nominal_mhz; 41 u32 nominal_mhz;
42 u32 min_mhz; 42 u16 min_mhz;
43 u32 max_mhz; 43 u16 max_mhz;
44}; 44};
45 45
46struct clk_set_info_list { 46struct clk_set_info_list {