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authorVaikundanathan S <vaikuns@nvidia.com>2018-04-25 05:22:47 -0400
committerTejal Kudav <tkudav@nvidia.com>2018-06-14 09:44:06 -0400
commitae59b322f54cefa792d3975e45de5aa346e2b774 (patch)
tree5ee220c7d2407ebd00f80d8fdcae063feccdcd87 /drivers/gpu/nvgpu/pstate
parent74ceef1230f414956aceaa027580c6f71fe42153 (diff)
gpu:nvgpu: Add gops to load pstate functions
Add gops to choose to/not to enable 1. clk_freq_controller 2. pmgr_domain 3. lpwr_pg Bug 200399373 Change-Id: Ie5131f9ea260f777fded8392f24815acef6cfbea Signed-off-by: Vaikundanathan S <vaikuns@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1702216 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/pstate')
-rw-r--r--drivers/gpu/nvgpu/pstate/pstate.c35
1 files changed, 23 insertions, 12 deletions
diff --git a/drivers/gpu/nvgpu/pstate/pstate.c b/drivers/gpu/nvgpu/pstate/pstate.c
index 3d6a436d..6c9d7736 100644
--- a/drivers/gpu/nvgpu/pstate/pstate.c
+++ b/drivers/gpu/nvgpu/pstate/pstate.c
@@ -96,15 +96,23 @@ int gk20a_init_pstate_support(struct gk20a *g)
96 if (err) 96 if (err)
97 return err; 97 return err;
98 98
99 err = pmgr_domain_sw_setup(g); 99 if(g->ops.clk.support_pmgr_domain) {
100 if (err) 100 err = pmgr_domain_sw_setup(g);
101 return err; 101 if (err)
102 return err;
103 }
102 104
103 err = clk_freq_controller_sw_setup(g); 105 if (g->ops.clk.support_clk_freq_controller) {
104 if (err) 106 err = clk_freq_controller_sw_setup(g);
105 return err; 107 if (err)
108 return err;
109 }
106 110
107 err = nvgpu_lpwr_pg_setup(g); 111 if(g->ops.clk.support_lpwr_pg) {
112 err = nvgpu_lpwr_pg_setup(g);
113 if (err)
114 return err;
115 }
108 116
109 return err; 117 return err;
110} 118}
@@ -176,10 +184,11 @@ int gk20a_init_pstate_pmu_support(struct gk20a *g)
176 if (err) 184 if (err)
177 return err; 185 return err;
178 186
179 err = clk_freq_controller_pmu_setup(g); 187 if (g->ops.clk.support_clk_freq_controller) {
180 if (err) 188 err = clk_freq_controller_pmu_setup(g);
181 return err; 189 if (err)
182 190 return err;
191 }
183 err = clk_pmu_vin_load(g); 192 err = clk_pmu_vin_load(g);
184 if (err) 193 if (err)
185 return err; 194 return err;
@@ -188,7 +197,9 @@ int gk20a_init_pstate_pmu_support(struct gk20a *g)
188 if (err) 197 if (err)
189 return err; 198 return err;
190 199
191 err = pmgr_domain_pmu_setup(g); 200 if (g->ops.clk.support_pmgr_domain)
201 err = pmgr_domain_pmu_setup(g);
202
192 return err; 203 return err;
193} 204}
194 205