gpu: nvgpu: pstate interface update

lpwr_entry_idx member is required
to map pstate with lwpr tables

JIRA DNVGPU-71

Change-Id: I4cad54c61dec7ad7e3c1a60178938d0eeaf65e24
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1247303
(cherry-picked from commit b1f6e0036922d2104b3d08548219e72a38f2e231)
Reviewed-on: http://git-master/r/1267403
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

2 files changed, 3 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/pstate/pstate.c b/drivers/gpu/nvgpu/pstate/pstate.c
index cca6c445..2e08ef01 100644
--- a/drivers/gpu/nvgpu/pstate/pstate.c
+++ b/drivers/gpu/nvgpu/pstate/pstate.c
@@ -177,6 +177,7 @@ int pstate_construct_super(struct gk20a *g, struct boardobj **ppboardobj,
 
         pstate->num = ptmppstate->num;
         pstate->clklist = ptmppstate->clklist;
+        pstate->lpwr_entry_idx = ptmppstate->lpwr_entry_idx;
 
         return 0;
 }
@@ -236,6 +237,7 @@ static int parse_pstate_entry_5x(struct gk20a *g,
         pstate->super.type = CTRL_PERF_PSTATE_TYPE_3X;
         pstate->num = 0x0F - entry->pstate_level;
         pstate->clklist.num_info = hdr->clock_entry_count;
+        pstate->lpwr_entry_idx = entry->lpwr_entry_idx;
 
         gk20a_dbg_info("pstate P%u", pstate->num);
 
diff --git a/drivers/gpu/nvgpu/pstate/pstate.h b/drivers/gpu/nvgpu/pstate/pstate.h
index 4ae72aa9..b6519c20 100644
--- a/drivers/gpu/nvgpu/pstate/pstate.h
+++ b/drivers/gpu/nvgpu/pstate/pstate.h
@@ -41,6 +41,7 @@ struct clk_set_info_list {
 struct pstate {
         struct boardobj super;
         u32 num;
+        u8 lpwr_entry_idx;
         struct clk_set_info_list clklist;
 };