diff options
author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2016-11-03 11:46:21 -0400 |
---|---|---|
committer | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 04:56:53 -0500 |
commit | e5824d8014c321fbe2c1e04e12307125dd50a472 (patch) | |
tree | 82657cd43c0dcd313b3251f3776e5e80b488fabc /drivers/gpu/nvgpu/pstate/pstate.c | |
parent | 62d13e613807e9bce3a9d1ef0c61725ef3a885ce (diff) |
gpu: nvgpu: MSCG support
- update gp106 pg engine init/list/features HALs
to support MS engine
- Added defines & interface for lpwr tables read from vbios.
- lpwr module which reads idx/gr/ms table from vbios to
map rppg/mscg support with respective p-state
- lpwr module public functions to control lpwr
features enable/disable mscg/rppg & mclk-change
request whenever change in mclk-change parameters
- lpwr public functions to know rppg/mscg support for
requested pstate,
- added mutex t prevent PG transition while arbiter
executes pstate transition
- nvgpu_clk_arb_get_current_pstate() of clk arbiter to
get current pstate
JIRA DNVGPU-71
Change-Id: Ifcd640cc19ef630be1e2a9ba07ec84023d8202a0
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1247553
(cherry picked from commit 8a441dea2410e1b5196ef24e56a7768b6980e46b)
Reviewed-on: http://git-master/r/1270989
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/pstate/pstate.c')
-rw-r--r-- | drivers/gpu/nvgpu/pstate/pstate.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/pstate/pstate.c b/drivers/gpu/nvgpu/pstate/pstate.c index 2e08ef01..82e809bb 100644 --- a/drivers/gpu/nvgpu/pstate/pstate.c +++ b/drivers/gpu/nvgpu/pstate/pstate.c | |||
@@ -83,6 +83,10 @@ int gk20a_init_pstate_support(struct gk20a *g) | |||
83 | return err; | 83 | return err; |
84 | 84 | ||
85 | err = clk_freq_controller_sw_setup(g); | 85 | err = clk_freq_controller_sw_setup(g); |
86 | if (err) | ||
87 | return err; | ||
88 | |||
89 | err = nvgpu_lpwr_pg_setup(g); | ||
86 | 90 | ||
87 | return err; | 91 | return err; |
88 | } | 92 | } |
@@ -327,6 +331,9 @@ static int pstate_sw_setup(struct gk20a *g) | |||
327 | 331 | ||
328 | gk20a_dbg_fn(""); | 332 | gk20a_dbg_fn(""); |
329 | 333 | ||
334 | init_waitqueue_head(&g->perf_pmu.pstatesobjs.pstate_notifier_wq); | ||
335 | mutex_init(&g->perf_pmu.pstatesobjs.pstate_mutex); | ||
336 | |||
330 | err = boardobjgrpconstruct_e32(&g->perf_pmu.pstatesobjs.super); | 337 | err = boardobjgrpconstruct_e32(&g->perf_pmu.pstatesobjs.super); |
331 | if (err) { | 338 | if (err) { |
332 | gk20a_err(dev_from_gk20a(g), | 339 | gk20a_err(dev_from_gk20a(g), |
@@ -361,7 +368,7 @@ done: | |||
361 | return err; | 368 | return err; |
362 | } | 369 | } |
363 | 370 | ||
364 | static struct pstate *pstate_find(struct gk20a *g, u32 num) | 371 | struct pstate *pstate_find(struct gk20a *g, u32 num) |
365 | { | 372 | { |
366 | struct pstates *pstates = &(g->perf_pmu.pstatesobjs); | 373 | struct pstates *pstates = &(g->perf_pmu.pstatesobjs); |
367 | struct pstate *pstate; | 374 | struct pstate *pstate; |