diff options
author | Thomas Fleury <tfleury@nvidia.com> | 2016-09-13 17:23:45 -0400 |
---|---|---|
committer | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 04:56:51 -0500 |
commit | 3d9c33c5953e383527c7e4af594adfe0c82b5788 (patch) | |
tree | 6de4ae86667c763ed0deef3add9336b570ca15ff /drivers/gpu/nvgpu/pstate/pstate.c | |
parent | c320ccfa952a2796db27d97111791bcbeff9f5c7 (diff) |
gpu: nvgpu: clk arbiter skeleton
Add clock arbiter skeleton with support of clock sessions,
notifications on clock changes, request numbering, and asynchronous
handling of clock requests. Provides minimum behaviour to allow
unit tests implementation. Actual arbitration and clock settings
will be done separately. For now, dummy arbiter keeps last
requested target mhz. Actual arbiter may move to a lockless
implementation.
Jira DNVGPU-125
Change-Id: I6a8e443fb0d15dc5f1993e7260256d71acddd106
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1223476
(cherry picked from commit cb130825d84e4124d273bd443e2b62d493377461)
Reviewed-on: http://git-master/r/1243105
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/pstate/pstate.c')
-rw-r--r-- | drivers/gpu/nvgpu/pstate/pstate.c | 40 |
1 files changed, 39 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/pstate/pstate.c b/drivers/gpu/nvgpu/pstate/pstate.c index e9b9775e..0dc15201 100644 --- a/drivers/gpu/nvgpu/pstate/pstate.c +++ b/drivers/gpu/nvgpu/pstate/pstate.c | |||
@@ -234,7 +234,7 @@ static int parse_pstate_entry_5x(struct gk20a *g, | |||
234 | memset(pstate, 0, sizeof(struct pstate)); | 234 | memset(pstate, 0, sizeof(struct pstate)); |
235 | pstate->super.type = CTRL_PERF_PSTATE_TYPE_3X; | 235 | pstate->super.type = CTRL_PERF_PSTATE_TYPE_3X; |
236 | pstate->num = 0x0F - entry->pstate_level; | 236 | pstate->num = 0x0F - entry->pstate_level; |
237 | pstate->clklist.clksetinfolistsize = hdr->clock_entry_count; | 237 | pstate->clklist.num_info = hdr->clock_entry_count; |
238 | 238 | ||
239 | gk20a_dbg_info("pstate P%u", pstate->num); | 239 | gk20a_dbg_info("pstate P%u", pstate->num); |
240 | 240 | ||
@@ -357,3 +357,41 @@ static int pstate_sw_setup(struct gk20a *g) | |||
357 | done: | 357 | done: |
358 | return err; | 358 | return err; |
359 | } | 359 | } |
360 | |||
361 | static struct pstate *pstate_find(struct gk20a *g, u32 num) | ||
362 | { | ||
363 | struct pstates *pstates = &(g->perf_pmu.pstatesobjs); | ||
364 | struct pstate *pstate; | ||
365 | u8 i; | ||
366 | |||
367 | gk20a_dbg_info("pstates = %p", pstates); | ||
368 | |||
369 | BOARDOBJGRP_FOR_EACH(&pstates->super.super, | ||
370 | struct pstate *, pstate, i) { | ||
371 | gk20a_dbg_info("pstate=%p num=%u (looking for num=%u)", | ||
372 | pstate, pstate->num, num); | ||
373 | if (pstate->num == num) | ||
374 | return pstate; | ||
375 | } | ||
376 | return NULL; | ||
377 | } | ||
378 | |||
379 | struct clk_set_info *pstate_get_clk_set_info(struct gk20a *g, | ||
380 | u32 pstate_num, enum nv_pmu_clk_clkwhich clkwhich) | ||
381 | { | ||
382 | struct pstate *pstate = pstate_find(g, pstate_num); | ||
383 | struct clk_set_info *info; | ||
384 | u32 clkidx; | ||
385 | |||
386 | gk20a_dbg_info("pstate = %p", pstate); | ||
387 | |||
388 | if (!pstate) | ||
389 | return NULL; | ||
390 | |||
391 | for (clkidx = 0; clkidx < pstate->clklist.num_info; clkidx++) { | ||
392 | info = &pstate->clklist.clksetinfo[clkidx]; | ||
393 | if (info->clkwhich == clkwhich) | ||
394 | return info; | ||
395 | } | ||
396 | return NULL; | ||
397 | } | ||