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authorMahantesh Kumbar <mkumbar@nvidia.com>2017-02-06 06:19:24 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-02-10 12:43:46 -0500
commit3885fe099af0bda910ac8ee64f2cd1a5bbea3ab0 (patch)
tree602ead38e7631ce81db7e600802fdac0aba49974 /drivers/gpu/nvgpu/pmuif/gpmuifvolt.h
parent8da422ac577338ecb2d4114e1d8d5f36cf4cab78 (diff)
gpu: nvgpu: move pmuif/* to drivers/gpu/nvgpu/include/nvgpu
Moved pmuif/* headers to drivers/gpu/nvgpu/include/nvgpu folder to support cross platform feature implementation. Made changes to files which accessed “include pmuif/*” to reflect pmuif/* movement changes. Deleted includes of gk20a.h/pmu_gk20a.h from pmuif/*.h files. Jira NVGPU-19 Change-Id: Iace4e107c24bdaff08a407eae3b147959173e485 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1299823 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/pmuif/gpmuifvolt.h')
-rw-r--r--drivers/gpu/nvgpu/pmuif/gpmuifvolt.h326
1 files changed, 0 insertions, 326 deletions
diff --git a/drivers/gpu/nvgpu/pmuif/gpmuifvolt.h b/drivers/gpu/nvgpu/pmuif/gpmuifvolt.h
deleted file mode 100644
index b4dea724..00000000
--- a/drivers/gpu/nvgpu/pmuif/gpmuifvolt.h
+++ /dev/null
@@ -1,326 +0,0 @@
1/*
2* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
3*
4* This program is free software; you can redistribute it and/or modify it
5* under the terms and conditions of the GNU General Public License,
6* version 2, as published by the Free Software Foundation.
7*
8* This program is distributed in the hope it will be useful, but WITHOUT
9* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11* more details.
12*/
13#ifndef _GPMUIFVOLT_H_
14#define _GPMUIFVOLT_H_
15
16#include "pmuif/gpmuifboardobj.h"
17#include <nvgpu/flcnif_cmn.h>
18#include "ctrl/ctrlvolt.h"
19
20#define NV_PMU_VOLT_VALUE_0V_IN_UV (0)
21
22/* ------------- VOLT_RAIL's GRP_SET defines and structures ------------- */
23
24#define NV_PMU_VOLT_BOARDOBJGRP_CLASS_ID_VOLT_RAIL 0x00
25#define NV_PMU_VOLT_BOARDOBJGRP_CLASS_ID_VOLT_DEVICE 0x01
26#define NV_PMU_VOLT_BOARDOBJGRP_CLASS_ID_VOLT_POLICY 0x02
27
28
29struct nv_pmu_volt_volt_rail_boardobjgrp_set_header {
30 struct nv_pmu_boardobjgrp_e32 super;
31};
32
33struct nv_pmu_volt_volt_rail_boardobj_set {
34
35 struct nv_pmu_boardobj super;
36 u8 rel_limit_vfe_equ_idx;
37 u8 alt_rel_limit_vfe_equ_idx;
38 u8 ov_limit_vfe_equ_idx;
39 u8 vmin_limit_vfe_equ_idx;
40 u8 volt_margin_limit_vfe_equ_idx;
41 u8 pwr_equ_idx;
42 u8 volt_dev_idx_default;
43 struct ctrl_boardobjgrp_mask_e32 volt_dev_mask;
44 s32 volt_delta_uv[CTRL_VOLT_RAIL_VOLT_DELTA_MAX_ENTRIES];
45};
46
47union nv_pmu_volt_volt_rail_boardobj_set_union {
48 struct nv_pmu_boardobj board_obj;
49 struct nv_pmu_volt_volt_rail_boardobj_set super;
50};
51
52NV_PMU_BOARDOBJ_GRP_SET_MAKE_E32(volt, volt_rail);
53
54/* ------------ VOLT_DEVICE's GRP_SET defines and structures ------------ */
55
56struct nv_pmu_volt_volt_device_boardobjgrp_set_header {
57 struct nv_pmu_boardobjgrp_e32 super;
58};
59
60struct nv_pmu_volt_volt_device_boardobj_set {
61 struct nv_pmu_boardobj super;
62 u32 switch_delay_us;
63 u32 voltage_min_uv;
64 u32 voltage_max_uv;
65 u32 volt_step_uv;
66};
67
68struct nv_pmu_volt_volt_device_vid_boardobj_set {
69 struct nv_pmu_volt_volt_device_boardobj_set super;
70 s32 voltage_base_uv;
71 s32 voltage_offset_scale_uv;
72 u8 gpio_pin[CTRL_VOLT_VOLT_DEV_VID_VSEL_MAX_ENTRIES];
73 u8 vsel_mask;
74};
75
76struct nv_pmu_volt_volt_device_pwm_boardobj_set {
77 struct nv_pmu_volt_volt_device_boardobj_set super;
78 u32 raw_period;
79 s32 voltage_base_uv;
80 s32 voltage_offset_scale_uv;
81 enum nv_pmu_pmgr_pwm_source pwm_source;
82};
83
84union nv_pmu_volt_volt_device_boardobj_set_union {
85 struct nv_pmu_boardobj board_obj;
86 struct nv_pmu_volt_volt_device_boardobj_set super;
87 struct nv_pmu_volt_volt_device_vid_boardobj_set vid;
88 struct nv_pmu_volt_volt_device_pwm_boardobj_set pwm;
89};
90
91NV_PMU_BOARDOBJ_GRP_SET_MAKE_E32(volt, volt_device);
92
93/* ------------ VOLT_POLICY's GRP_SET defines and structures ------------ */
94struct nv_pmu_volt_volt_policy_boardobjgrp_set_header {
95
96 struct nv_pmu_boardobjgrp_e32 super;
97};
98
99struct nv_pmu_volt_volt_policy_boardobj_set {
100 struct nv_pmu_boardobj super;
101};
102struct nv_pmu_volt_volt_policy_sr_boardobj_set {
103 struct nv_pmu_volt_volt_policy_boardobj_set super;
104 u8 rail_idx;
105};
106
107struct nv_pmu_volt_volt_policy_splt_r_boardobj_set {
108 struct nv_pmu_volt_volt_policy_boardobj_set super;
109 u8 rail_idx_master;
110 u8 rail_idx_slave;
111 u8 delta_min_vfe_equ_idx;
112 u8 delta_max_vfe_equ_idx;
113 s32 offset_delta_min_uv;
114 s32 offset_delta_max_uv;
115};
116
117struct nv_pmu_volt_volt_policy_srms_boardobj_set {
118 struct nv_pmu_volt_volt_policy_splt_r_boardobj_set super;
119 u16 inter_switch_delayus;
120};
121
122/* sr - > single_rail */
123struct nv_pmu_volt_volt_policy_srss_boardobj_set {
124 struct nv_pmu_volt_volt_policy_splt_r_boardobj_set super;
125};
126
127union nv_pmu_volt_volt_policy_boardobj_set_union {
128 struct nv_pmu_boardobj board_obj;
129 struct nv_pmu_volt_volt_policy_boardobj_set super;
130 struct nv_pmu_volt_volt_policy_sr_boardobj_set single_rail;
131 struct nv_pmu_volt_volt_policy_splt_r_boardobj_set split_rail;
132 struct nv_pmu_volt_volt_policy_srms_boardobj_set
133 split_rail_m_s;
134 struct nv_pmu_volt_volt_policy_srss_boardobj_set
135 split_rail_s_s;
136};
137
138NV_PMU_BOARDOBJ_GRP_SET_MAKE_E32(volt, volt_policy);
139
140/* ----------- VOLT_RAIL's GRP_GET_STATUS defines and structures ----------- */
141struct nv_pmu_volt_volt_rail_boardobjgrp_get_status_header {
142 struct nv_pmu_boardobjgrp_e32 super;
143};
144
145struct nv_pmu_volt_volt_rail_boardobj_get_status {
146 struct nv_pmu_boardobj_query super;
147 u32 curr_volt_defaultu_v;
148 u32 rel_limitu_v;
149 u32 alt_rel_limitu_v;
150 u32 ov_limitu_v;
151 u32 max_limitu_v;
152 u32 vmin_limitu_v;
153 s32 volt_margin_limitu_v;
154 u32 rsvd;
155};
156
157union nv_pmu_volt_volt_rail_boardobj_get_status_union {
158 struct nv_pmu_boardobj_query board_obj;
159 struct nv_pmu_volt_volt_rail_boardobj_get_status super;
160};
161
162NV_PMU_BOARDOBJ_GRP_GET_STATUS_MAKE_E32(volt, volt_rail);
163
164/* ---------- VOLT_DEVICE's GRP_GET_STATUS defines and structures ---------- */
165struct nv_pmu_volt_volt_device_boardobjgrp_get_status_header {
166 struct nv_pmu_boardobjgrp_e32 super;
167};
168
169struct nv_pmu_volt_volt_device_boardobj_get_status {
170 struct nv_pmu_boardobj_query super;
171};
172
173union nv_pmu_volt_volt_device_boardobj_get_status_union {
174 struct nv_pmu_boardobj_query board_obj;
175 struct nv_pmu_volt_volt_device_boardobj_get_status super;
176};
177
178NV_PMU_BOARDOBJ_GRP_GET_STATUS_MAKE_E32(volt, volt_device);
179
180/* ---------- VOLT_POLICY's GRP_GET_STATUS defines and structures ---------- */
181struct nv_pmu_volt_volt_policy_boardobjgrp_get_status_header {
182 struct nv_pmu_boardobjgrp_e32 super;
183};
184
185struct nv_pmu_volt_volt_policy_boardobj_get_status {
186 struct nv_pmu_boardobj_query super;
187 u32 offset_volt_requ_v;
188 u32 offset_volt_curru_v;
189};
190
191struct nv_pmu_volt_volt_policy_sr_boardobj_get_status {
192 struct nv_pmu_volt_volt_policy_boardobj_get_status super;
193 u32 curr_voltu_v;
194};
195
196struct nv_pmu_volt_volt_policy_splt_r_boardobj_get_status {
197 struct nv_pmu_volt_volt_policy_boardobj_get_status super;
198 s32 delta_minu_v;
199 s32 delta_maxu_v;
200 s32 orig_delta_minu_v;
201 s32 orig_delta_maxu_v;
202 u32 curr_volt_masteru_v;
203 u32 curr_volt_slaveu_v;
204 bool b_violation;
205};
206
207/* srms -> split_rail_multi_step */
208struct nv_pmu_volt_volt_policy_srms_boardobj_get_status {
209 struct nv_pmu_volt_volt_policy_splt_r_boardobj_get_status super;
210};
211
212/* srss -> split_rail_single_step */
213struct nv_pmu_volt_volt_policy_srss_boardobj_get_status {
214 struct nv_pmu_volt_volt_policy_splt_r_boardobj_get_status super;
215};
216
217union nv_pmu_volt_volt_policy_boardobj_get_status_union {
218 struct nv_pmu_boardobj_query board_obj;
219 struct nv_pmu_volt_volt_policy_boardobj_get_status super;
220 struct nv_pmu_volt_volt_policy_sr_boardobj_get_status single_rail;
221 struct nv_pmu_volt_volt_policy_splt_r_boardobj_get_status split_rail;
222 struct nv_pmu_volt_volt_policy_srms_boardobj_get_status
223 split_rail_m_s;
224 struct nv_pmu_volt_volt_policy_srss_boardobj_get_status
225 split_rail_s_s;
226};
227
228NV_PMU_BOARDOBJ_GRP_GET_STATUS_MAKE_E32(volt, volt_policy);
229
230struct nv_pmu_volt_policy_voltage_data {
231 u8 policy_idx;
232 struct ctrl_perf_volt_rail_list
233 rail_list;
234};
235
236struct nv_pmu_volt_rail_get_voltage {
237 u8 rail_idx;
238 u32 voltage_uv;
239};
240
241struct nv_pmu_volt_volt_rail_set_noise_unaware_vmin {
242 u8 num_rails;
243 struct ctrl_volt_volt_rail_list
244 rail_list;
245};
246
247#define NV_PMU_VOLT_CMD_ID_BOARDOBJ_GRP_SET (0x00000000)
248#define NV_PMU_VOLT_CMD_ID_RPC (0x00000001)
249#define NV_PMU_VOLT_CMD_ID_BOARDOBJ_GRP_GET_STATUS (0x00000002)
250#define NV_PMU_VOLT_RPC_ID_VOLT_RAIL_SET_NOISE_UNAWARE_VMIN (0x00000004)
251
252/*!
253* PMU VOLT RPC calls.
254*/
255#define NV_PMU_VOLT_RPC_ID_LOAD (0x00000000)
256#define NV_PMU_VOLT_RPC_ID_VOLT_POLICY_SET_VOLTAGE (0x00000002)
257#define NV_PMU_VOLT_RPC_ID_VOLT_RAIL_GET_VOLTAGE (0x00000003)
258
259struct nv_pmu_volt_cmd_rpc {
260 u8 cmd_type;
261 u8 pad[3];
262 struct nv_pmu_allocation request;
263};
264
265#define NV_PMU_VOLT_CMD_RPC_ALLOC_OFFSET \
266 offsetof(struct nv_pmu_volt_cmd_rpc, request)
267
268struct nv_pmu_volt_cmd {
269 union {
270 u8 cmd_type;
271 struct nv_pmu_boardobj_cmd_grp grp_set;
272 struct nv_pmu_volt_cmd_rpc rpc;
273 struct nv_pmu_boardobj_cmd_grp grp_get_status;
274 };
275};
276
277struct nv_pmu_volt_rpc {
278 u8 function;
279 bool b_supported;
280 bool b_success;
281 flcn_status flcn_status;
282 union {
283 struct nv_pmu_volt_policy_voltage_data volt_policy_voltage_data;
284 struct nv_pmu_volt_rail_get_voltage volt_rail_get_voltage;
285 struct nv_pmu_volt_volt_rail_set_noise_unaware_vmin
286 volt_rail_set_noise_unaware_vmin;
287 } params;
288};
289
290/*!
291* VOLT MSG ID definitions
292*/
293#define NV_PMU_VOLT_MSG_ID_BOARDOBJ_GRP_SET (0x00000000)
294#define NV_PMU_VOLT_MSG_ID_RPC (0x00000001)
295#define NV_PMU_VOLT_MSG_ID_BOARDOBJ_GRP_GET_STATUS (0x00000002)
296
297/*!
298* Message carrying the result of the VOLT RPC execution.
299*/
300struct nv_pmu_volt_msg_rpc {
301 u8 msg_type;
302 u8 rsvd[3];
303 struct nv_pmu_allocation response;
304};
305
306#define NV_PMU_VOLT_MSG_RPC_ALLOC_OFFSET \
307 offsetof(struct nv_pmu_volt_msg_rpc, response)
308
309struct nv_pmu_volt_msg {
310 union {
311 u8 msg_type;
312 struct nv_pmu_boardobj_msg_grp grp_set;
313 struct nv_pmu_volt_msg_rpc rpc;
314 struct nv_pmu_boardobj_msg_grp grp_get_status;
315 };
316};
317
318#define NV_PMU_VF_INJECT_MAX_VOLT_RAILS (2)
319
320struct nv_pmu_volt_volt_rail_list {
321 u8 num_rails;
322 struct ctrl_perf_volt_rail_list_item
323 rails[NV_PMU_VF_INJECT_MAX_VOLT_RAILS];
324};
325
326#endif /* _GPMUIFVOLT_H_*/
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-29 18:59:00 -0400