diff options
author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2017-07-04 01:55:00 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-07-05 03:39:21 -0400 |
commit | e808d345f11885453fc65862ec4e3dd4a375ff6d (patch) | |
tree | ccc3bb1ade5ff991ca1805084b76f154ca9736ee /drivers/gpu/nvgpu/pmgr | |
parent | 2cf964d175abc0f3eae9ed0e01e6eeed5cd6b4da (diff) |
gpu: nvgpu: rename gk20a_pmu_cmd_post()
- rename gk20a_pmu_cmd_post() to nvgpu_pmu_cmd_post()
- replaced gk20a_pmu_cmd_post() with nvgpu_pmu_cmd_post()
wherever called.
JIRA NVGPU-93
Change-Id: I7ca43170646bab1657a4b4cf125d9f94d589b0eb
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master/r/1512904
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/pmgr')
-rw-r--r-- | drivers/gpu/nvgpu/pmgr/pmgrpmu.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/pmgr/pmgrpmu.c b/drivers/gpu/nvgpu/pmgr/pmgrpmu.c index 771a8b8d..803b1bc0 100644 --- a/drivers/gpu/nvgpu/pmgr/pmgrpmu.c +++ b/drivers/gpu/nvgpu/pmgr/pmgrpmu.c | |||
@@ -109,7 +109,7 @@ static u32 pmgr_pmu_set_object(struct gk20a *g, | |||
109 | /* Setup the handler params to communicate back results.*/ | 109 | /* Setup the handler params to communicate back results.*/ |
110 | handlerparams.success = 0; | 110 | handlerparams.success = 0; |
111 | 111 | ||
112 | status = gk20a_pmu_cmd_post(g, &cmd, NULL, &payload, | 112 | status = nvgpu_pmu_cmd_post(g, &cmd, NULL, &payload, |
113 | PMU_COMMAND_QUEUE_LPQ, | 113 | PMU_COMMAND_QUEUE_LPQ, |
114 | pmgr_pmucmdhandler, | 114 | pmgr_pmucmdhandler, |
115 | (void *)&handlerparams, | 115 | (void *)&handlerparams, |
@@ -392,7 +392,7 @@ u32 pmgr_pmu_pwr_devices_query_blocking( | |||
392 | /* Setup the handler params to communicate back results.*/ | 392 | /* Setup the handler params to communicate back results.*/ |
393 | handlerparams.success = 0; | 393 | handlerparams.success = 0; |
394 | 394 | ||
395 | status = gk20a_pmu_cmd_post(g, &cmd, NULL, &payload, | 395 | status = nvgpu_pmu_cmd_post(g, &cmd, NULL, &payload, |
396 | PMU_COMMAND_QUEUE_LPQ, | 396 | PMU_COMMAND_QUEUE_LPQ, |
397 | pmgr_pmucmdhandler, | 397 | pmgr_pmucmdhandler, |
398 | (void *)&handlerparams, | 398 | (void *)&handlerparams, |
@@ -436,7 +436,7 @@ static u32 pmgr_pmu_load_blocking(struct gk20a *g) | |||
436 | /* Setup the handler params to communicate back results.*/ | 436 | /* Setup the handler params to communicate back results.*/ |
437 | handlerparams.success = 0; | 437 | handlerparams.success = 0; |
438 | 438 | ||
439 | status = gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, | 439 | status = nvgpu_pmu_cmd_post(g, &cmd, NULL, NULL, |
440 | PMU_COMMAND_QUEUE_LPQ, | 440 | PMU_COMMAND_QUEUE_LPQ, |
441 | pmgr_pmucmdhandler, | 441 | pmgr_pmucmdhandler, |
442 | (void *)&handlerparams, | 442 | (void *)&handlerparams, |