gpu: nvgpu: Remove gk20a_dbg* functions

Switch all logging to nvgpu_log*(). gk20a_dbg* macros are
intentionally left there because of use from other repositories.

Because the new functions do not work without a pointer to struct
gk20a, and piping it just for logging is excessive, some log messages
are deleted.

Change-Id: I00e22e75fe4596a330bb0282ab4774b3639ee31e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1704148
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 files changed, 22 insertions, 22 deletions

diff --git a/drivers/gpu/nvgpu/pmgr/pwrdev.c b/drivers/gpu/nvgpu/pmgr/pwrdev.c
index 7f4ab716..da51ac4b 100644
--- a/drivers/gpu/nvgpu/pmgr/pwrdev.c
+++ b/drivers/gpu/nvgpu/pmgr/pwrdev.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -36,7 +36,7 @@ static u32 _pwr_device_pmudata_instget(struct gk20a *g,
         struct nv_pmu_pmgr_pwr_device_desc_table *ppmgrdevice =
                 (struct nv_pmu_pmgr_pwr_device_desc_table *)pmuboardobjgrp;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         /*check whether pmuboardobjgrp has a valid boardobj in index*/
         if (((u32)BIT(idx) &
@@ -46,7 +46,7 @@ static u32 _pwr_device_pmudata_instget(struct gk20a *g,
         *ppboardobjpmudata = (struct nv_pmu_boardobj *)
                 &ppmgrdevice->devices[idx].data.board_obj;
 
-        gk20a_dbg_info(" Done");
+        nvgpu_log_info(g, " Done");
 
         return 0;
 }
@@ -122,7 +122,7 @@ static struct boardobj *construct_pwr_device(struct gk20a *g,
                 pwrdev->r_shuntm_ohm[indx] = ina3221->r_shuntm_ohm[indx];
         }
 
-        gk20a_dbg_info(" Done");
+        nvgpu_log_info(g, " Done");
 
         return board_obj_ptr;
 }
@@ -145,7 +145,7 @@ static u32 devinit_get_pwr_device_table(struct gk20a *g,
                 struct pwr_device_ina3221 ina3221;
         } pwr_device_data;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         pwr_device_table_ptr = (u8 *)nvgpu_bios_get_perf_table_ptrs(g,
                         g->bios.perf_token, POWER_SENSORS_TABLE);
@@ -280,7 +280,7 @@ static u32 devinit_get_pwr_device_table(struct gk20a *g,
         }
 
 done:
-        gk20a_dbg_info(" done status %x", status);
+        nvgpu_log_info(g, " done status %x", status);
         return status;
 }
 
@@ -310,6 +310,6 @@ u32 pmgr_device_sw_setup(struct gk20a *g)
                 goto done;
 
 done:
-        gk20a_dbg_info(" done status %x", status);
+        nvgpu_log_info(g, " done status %x", status);
         return status;
 }
diff --git a/drivers/gpu/nvgpu/pmgr/pwrmonitor.c b/drivers/gpu/nvgpu/pmgr/pwrmonitor.c
index 00c930a6..5e0cc966 100644
--- a/drivers/gpu/nvgpu/pmgr/pwrmonitor.c
+++ b/drivers/gpu/nvgpu/pmgr/pwrmonitor.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -36,7 +36,7 @@ static u32 _pwr_channel_pmudata_instget(struct gk20a *g,
         struct nv_pmu_pmgr_pwr_channel_desc *ppmgrchannel =
                 (struct nv_pmu_pmgr_pwr_channel_desc *)pmuboardobjgrp;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         /*check whether pmuboardobjgrp has a valid boardobj in index*/
         if (((u32)BIT(idx) &
@@ -49,7 +49,7 @@ static u32 _pwr_channel_pmudata_instget(struct gk20a *g,
         /* handle Global/common data here as we need index */
         ppmgrchannel->channels[idx].data.pwr_channel.ch_idx = idx;
 
-        gk20a_dbg_info(" Done");
+        nvgpu_log_info(g, " Done");
 
         return 0;
 }
@@ -62,7 +62,7 @@ static u32 _pwr_channel_rels_pmudata_instget(struct gk20a *g,
         struct nv_pmu_pmgr_pwr_chrelationship_desc *ppmgrchrels =
                 (struct nv_pmu_pmgr_pwr_chrelationship_desc *)pmuboardobjgrp;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         /*check whether pmuboardobjgrp has a valid boardobj in index*/
         if (((u32)BIT(idx) &
@@ -72,7 +72,7 @@ static u32 _pwr_channel_rels_pmudata_instget(struct gk20a *g,
         *ppboardobjpmudata = (struct nv_pmu_boardobj *)
                 &ppmgrchrels->ch_rels[idx].data.board_obj;
 
-        gk20a_dbg_info(" Done");
+        nvgpu_log_info(g, " Done");
 
         return 0;
 }
@@ -169,7 +169,7 @@ static struct boardobj *construct_pwr_topology(struct gk20a *g,
         pwrchannel->pwr_dev_idx = sensor->pwr_dev_idx;
         pwrchannel->pwr_dev_prov_idx = sensor->pwr_dev_prov_idx;
 
-        gk20a_dbg_info(" Done");
+        nvgpu_log_info(g, " Done");
 
         return board_obj_ptr;
 }
@@ -192,7 +192,7 @@ static u32 devinit_get_pwr_topology_table(struct gk20a *g,
                 struct pwr_channel_sensor sensor;
         } pwr_topology_data;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         pwr_topology_table_ptr = (u8 *)nvgpu_bios_get_perf_table_ptrs(g,
                         g->bios.perf_token, POWER_TOPOLOGY_TABLE);
@@ -292,7 +292,7 @@ static u32 devinit_get_pwr_topology_table(struct gk20a *g,
         }
 
 done:
-        gk20a_dbg_info(" done status %x", status);
+        nvgpu_log_info(g, " done status %x", status);
         return status;
 }
 
@@ -365,6 +365,6 @@ u32 pmgr_monitor_sw_setup(struct gk20a *g)
         }
 
 done:
-        gk20a_dbg_info(" done status %x", status);
+        nvgpu_log_info(g, " done status %x", status);
         return status;
 }
diff --git a/drivers/gpu/nvgpu/pmgr/pwrpolicy.c b/drivers/gpu/nvgpu/pmgr/pwrpolicy.c
index 2942268f..0d617f6a 100644
--- a/drivers/gpu/nvgpu/pmgr/pwrpolicy.c
+++ b/drivers/gpu/nvgpu/pmgr/pwrpolicy.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -270,7 +270,7 @@ static struct boardobj *construct_pwr_policy(struct gk20a *g,
         pwrpolicyhwthreshold = (struct pwr_policy_hw_threshold*)board_obj_ptr;
         pwrpolicy = (struct pwr_policy *)board_obj_ptr;
 
-        gk20a_dbg_fn("min=%u rated=%u max=%u",
+        nvgpu_log_fn(g, "min=%u rated=%u max=%u",
                 pwrpolicyparams->limit_min,
                 pwrpolicyparams->limit_rated,
                 pwrpolicyparams->limit_max);
@@ -358,7 +358,7 @@ static struct boardobj *construct_pwr_policy(struct gk20a *g,
                 pwrpolicyswthreshold->event_id = swthreshold->event_id;
         }
 
-        gk20a_dbg_info(" Done");
+        nvgpu_log_info(g, " Done");
 
         return board_obj_ptr;
 }
@@ -527,7 +527,7 @@ static u32 devinit_get_pwr_policy_table(struct gk20a *g,
         u32 hw_threshold_policy_index = 0;
         union pwr_policy_data_union pwr_policy_data;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         ptr = (u8 *)nvgpu_bios_get_perf_table_ptrs(g,
                         g->bios.perf_token, POWER_CAPPING_TABLE);
@@ -702,7 +702,7 @@ static u32 devinit_get_pwr_policy_table(struct gk20a *g,
         }
 
 done:
-        gk20a_dbg_info(" done status %x", status);
+        nvgpu_log_info(g, " done status %x", status);
         return status;
 }
 
@@ -773,6 +773,6 @@ u32 pmgr_policy_sw_setup(struct gk20a *g)
         g->pmgr_pmu.pmgr_policyobjs.client_work_item.b_pending = false;
 
 done:
-        gk20a_dbg_info(" done status %x", status);
+        nvgpu_log_info(g, " done status %x", status);
         return status;
 }