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authorTerje Bergstrom <tbergstrom@nvidia.com>2017-04-06 15:56:41 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-04-10 15:24:22 -0400
commit54eb74539342ce0fa6961e46f2ce22b68ad2fb21 (patch)
tree0de41f6b86a1b44f91db1361fcb68acec4056d99 /drivers/gpu/nvgpu/pmgr
parentbc4a0bd0acd1d9b09f753d97383caa542cbb728a (diff)
gpu: nvgpu: pmgr: Use new error macros
gk20a_err() and gk20a_warn() require a struct device pointer, which is not portable across operating systems. The new nvgpu_err() and nvgpu_warn() macros take struct gk20a pointer. Convert code to use the more portable macros. JIRA NVGPU-16 Change-Id: I8d85e4d3da1fe8f99649ef4395a5b0dc52b0caf2 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1457353 Reviewed-by: Alex Waterman <alexw@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/pmgr')
-rw-r--r--drivers/gpu/nvgpu/pmgr/pmgr.c24
-rw-r--r--drivers/gpu/nvgpu/pmgr/pmgrpmu.c62
-rw-r--r--drivers/gpu/nvgpu/pmgr/pwrdev.c8
-rw-r--r--drivers/gpu/nvgpu/pmgr/pwrmonitor.c12
-rw-r--r--drivers/gpu/nvgpu/pmgr/pwrpolicy.c28
5 files changed, 56 insertions, 78 deletions
diff --git a/drivers/gpu/nvgpu/pmgr/pmgr.c b/drivers/gpu/nvgpu/pmgr/pmgr.c
index e101aba8..c41a3a22 100644
--- a/drivers/gpu/nvgpu/pmgr/pmgr.c
+++ b/drivers/gpu/nvgpu/pmgr/pmgr.c
@@ -23,8 +23,7 @@ int pmgr_pwr_devices_get_power(struct gk20a *g, u32 *val)
23 23
24 status = pmgr_pmu_pwr_devices_query_blocking(g, 1, &payload); 24 status = pmgr_pmu_pwr_devices_query_blocking(g, 1, &payload);
25 if (status) 25 if (status)
26 gk20a_err(dev_from_gk20a(g), 26 nvgpu_err(g, "pmgr_pwr_devices_get_current_power failed %x",
27 "pmgr_pwr_devices_get_current_power failed %x",
28 status); 27 status);
29 28
30 *val = payload.devices[0].powerm_w; 29 *val = payload.devices[0].powerm_w;
@@ -39,8 +38,7 @@ int pmgr_pwr_devices_get_current(struct gk20a *g, u32 *val)
39 38
40 status = pmgr_pmu_pwr_devices_query_blocking(g, 1, &payload); 39 status = pmgr_pmu_pwr_devices_query_blocking(g, 1, &payload);
41 if (status) 40 if (status)
42 gk20a_err(dev_from_gk20a(g), 41 nvgpu_err(g, "pmgr_pwr_devices_get_current failed %x",
43 "pmgr_pwr_devices_get_current failed %x",
44 status); 42 status);
45 43
46 *val = payload.devices[0].currentm_a; 44 *val = payload.devices[0].currentm_a;
@@ -55,8 +53,7 @@ int pmgr_pwr_devices_get_voltage(struct gk20a *g, u32 *val)
55 53
56 status = pmgr_pmu_pwr_devices_query_blocking(g, 1, &payload); 54 status = pmgr_pmu_pwr_devices_query_blocking(g, 1, &payload);
57 if (status) 55 if (status)
58 gk20a_err(dev_from_gk20a(g), 56 nvgpu_err(g, "pmgr_pwr_devices_get_current_voltage failed %x",
59 "pmgr_pwr_devices_get_current_voltage failed %x",
60 status); 57 status);
61 58
62 *val = payload.devices[0].voltageu_v; 59 *val = payload.devices[0].voltageu_v;
@@ -117,20 +114,17 @@ static void pmgr_debugfs_init(struct gk20a *g) {
117 dbgentry = debugfs_create_file( 114 dbgentry = debugfs_create_file(
118 "power", S_IRUGO, platform->debugfs, g, &pmgr_power_ctrl_fops); 115 "power", S_IRUGO, platform->debugfs, g, &pmgr_power_ctrl_fops);
119 if (!dbgentry) 116 if (!dbgentry)
120 gk20a_err(dev_from_gk20a(g), 117 nvgpu_err(g, "debugfs entry create failed for power");
121 "debugfs entry create failed for power");
122 118
123 dbgentry = debugfs_create_file( 119 dbgentry = debugfs_create_file(
124 "current", S_IRUGO, platform->debugfs, g, &pmgr_current_ctrl_fops); 120 "current", S_IRUGO, platform->debugfs, g, &pmgr_current_ctrl_fops);
125 if (!dbgentry) 121 if (!dbgentry)
126 gk20a_err(dev_from_gk20a(g), 122 nvgpu_err(g, "debugfs entry create failed for current");
127 "debugfs entry create failed for current");
128 123
129 dbgentry = debugfs_create_file( 124 dbgentry = debugfs_create_file(
130 "voltage", S_IRUGO, platform->debugfs, g, &pmgr_voltage_ctrl_fops); 125 "voltage", S_IRUGO, platform->debugfs, g, &pmgr_voltage_ctrl_fops);
131 if (!dbgentry) 126 if (!dbgentry)
132 gk20a_err(dev_from_gk20a(g), 127 nvgpu_err(g, "debugfs entry create failed for voltage");
133 "debugfs entry create failed for voltage");
134} 128}
135#endif 129#endif
136 130
@@ -140,7 +134,7 @@ u32 pmgr_domain_sw_setup(struct gk20a *g)
140 134
141 status = pmgr_device_sw_setup(g); 135 status = pmgr_device_sw_setup(g);
142 if (status) { 136 if (status) {
143 gk20a_err(dev_from_gk20a(g), 137 nvgpu_err(g,
144 "error creating boardobjgrp for pmgr devices, status - 0x%x", 138 "error creating boardobjgrp for pmgr devices, status - 0x%x",
145 status); 139 status);
146 goto exit; 140 goto exit;
@@ -148,7 +142,7 @@ u32 pmgr_domain_sw_setup(struct gk20a *g)
148 142
149 status = pmgr_monitor_sw_setup(g); 143 status = pmgr_monitor_sw_setup(g);
150 if (status) { 144 if (status) {
151 gk20a_err(dev_from_gk20a(g), 145 nvgpu_err(g,
152 "error creating boardobjgrp for pmgr monitor, status - 0x%x", 146 "error creating boardobjgrp for pmgr monitor, status - 0x%x",
153 status); 147 status);
154 goto exit; 148 goto exit;
@@ -156,7 +150,7 @@ u32 pmgr_domain_sw_setup(struct gk20a *g)
156 150
157 status = pmgr_policy_sw_setup(g); 151 status = pmgr_policy_sw_setup(g);
158 if (status) { 152 if (status) {
159 gk20a_err(dev_from_gk20a(g), 153 nvgpu_err(g,
160 "error creating boardobjgrp for pmgr policy, status - 0x%x", 154 "error creating boardobjgrp for pmgr policy, status - 0x%x",
161 status); 155 status);
162 goto exit; 156 goto exit;
diff --git a/drivers/gpu/nvgpu/pmgr/pmgrpmu.c b/drivers/gpu/nvgpu/pmgr/pmgrpmu.c
index 9201de2b..95225961 100644
--- a/drivers/gpu/nvgpu/pmgr/pmgrpmu.c
+++ b/drivers/gpu/nvgpu/pmgr/pmgrpmu.c
@@ -37,17 +37,14 @@ static void pmgr_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg,
37 if ((msg->msg.pmgr.msg_type != NV_PMU_PMGR_MSG_ID_SET_OBJECT) && 37 if ((msg->msg.pmgr.msg_type != NV_PMU_PMGR_MSG_ID_SET_OBJECT) &&
38 (msg->msg.pmgr.msg_type != NV_PMU_PMGR_MSG_ID_QUERY) && 38 (msg->msg.pmgr.msg_type != NV_PMU_PMGR_MSG_ID_QUERY) &&
39 (msg->msg.pmgr.msg_type != NV_PMU_PMGR_MSG_ID_LOAD)) { 39 (msg->msg.pmgr.msg_type != NV_PMU_PMGR_MSG_ID_LOAD)) {
40 gk20a_err(dev_from_gk20a(g), 40 nvgpu_err(g, "unknow msg %x", msg->msg.pmgr.msg_type);
41 "unknow msg %x",
42 msg->msg.pmgr.msg_type);
43 return; 41 return;
44 } 42 }
45 43
46 if (msg->msg.pmgr.msg_type == NV_PMU_PMGR_MSG_ID_SET_OBJECT) { 44 if (msg->msg.pmgr.msg_type == NV_PMU_PMGR_MSG_ID_SET_OBJECT) {
47 if ((msg->msg.pmgr.set_object.b_success != 1) || 45 if ((msg->msg.pmgr.set_object.b_success != 1) ||
48 (msg->msg.pmgr.set_object.flcnstatus != 0) ) { 46 (msg->msg.pmgr.set_object.flcnstatus != 0) ) {
49 gk20a_err(dev_from_gk20a(g), 47 nvgpu_err(g, "pmgr msg failed %x %x %x %x",
50 "pmgr msg failed %x %x %x %x",
51 msg->msg.pmgr.set_object.msg_type, 48 msg->msg.pmgr.set_object.msg_type,
52 msg->msg.pmgr.set_object.b_success, 49 msg->msg.pmgr.set_object.b_success,
53 msg->msg.pmgr.set_object.flcnstatus, 50 msg->msg.pmgr.set_object.flcnstatus,
@@ -57,8 +54,7 @@ static void pmgr_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg,
57 } else if (msg->msg.pmgr.msg_type == NV_PMU_PMGR_MSG_ID_QUERY) { 54 } else if (msg->msg.pmgr.msg_type == NV_PMU_PMGR_MSG_ID_QUERY) {
58 if ((msg->msg.pmgr.query.b_success != 1) || 55 if ((msg->msg.pmgr.query.b_success != 1) ||
59 (msg->msg.pmgr.query.flcnstatus != 0) ) { 56 (msg->msg.pmgr.query.flcnstatus != 0) ) {
60 gk20a_err(dev_from_gk20a(g), 57 nvgpu_err(g, "pmgr msg failed %x %x %x %x",
61 "pmgr msg failed %x %x %x %x",
62 msg->msg.pmgr.query.msg_type, 58 msg->msg.pmgr.query.msg_type,
63 msg->msg.pmgr.query.b_success, 59 msg->msg.pmgr.query.b_success,
64 msg->msg.pmgr.query.flcnstatus, 60 msg->msg.pmgr.query.flcnstatus,
@@ -68,8 +64,7 @@ static void pmgr_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg,
68 } else if (msg->msg.pmgr.msg_type == NV_PMU_PMGR_MSG_ID_LOAD) { 64 } else if (msg->msg.pmgr.msg_type == NV_PMU_PMGR_MSG_ID_LOAD) {
69 if ((msg->msg.pmgr.query.b_success != 1) || 65 if ((msg->msg.pmgr.query.b_success != 1) ||
70 (msg->msg.pmgr.query.flcnstatus != 0) ) { 66 (msg->msg.pmgr.query.flcnstatus != 0) ) {
71 gk20a_err(dev_from_gk20a(g), 67 nvgpu_err(g, "pmgr msg failed %x %x %x",
72 "pmgr msg failed %x %x %x",
73 msg->msg.pmgr.load.msg_type, 68 msg->msg.pmgr.load.msg_type,
74 msg->msg.pmgr.load.b_success, 69 msg->msg.pmgr.load.b_success,
75 msg->msg.pmgr.load.flcnstatus); 70 msg->msg.pmgr.load.flcnstatus);
@@ -115,7 +110,7 @@ static u32 pmgr_pmu_set_object(struct gk20a *g,
115 (void *)&handlerparams, 110 (void *)&handlerparams,
116 &seqdesc, ~0); 111 &seqdesc, ~0);
117 if (status) { 112 if (status) {
118 gk20a_err(dev_from_gk20a(g), 113 nvgpu_err(g,
119 "unable to post pmgr cmd for unit %x cmd id %x obj type %x", 114 "unable to post pmgr cmd for unit %x cmd id %x obj type %x",
120 cmd.hdr.unit_id, pcmd->cmd_type, pcmd->object_type); 115 cmd.hdr.unit_id, pcmd->cmd_type, pcmd->object_type);
121 goto exit; 116 goto exit;
@@ -126,7 +121,7 @@ static u32 pmgr_pmu_set_object(struct gk20a *g,
126 &handlerparams.success, 1); 121 &handlerparams.success, 1);
127 122
128 if (handlerparams.success == 0) { 123 if (handlerparams.success == 0) {
129 gk20a_err(dev_from_gk20a(g), "could not process cmd\n"); 124 nvgpu_err(g, "could not process cmd");
130 status = -ETIMEDOUT; 125 status = -ETIMEDOUT;
131 goto exit; 126 goto exit;
132 } 127 }
@@ -162,8 +157,7 @@ static u32 pmgr_send_i2c_device_topology_to_pmu(struct gk20a *g)
162 &i2c_desc_table); 157 &i2c_desc_table);
163 158
164 if (status) 159 if (status)
165 gk20a_err(dev_from_gk20a(g), 160 nvgpu_err(g, "pmgr_pmu_set_object failed %x",
166 "pmgr_pmu_set_object failed %x",
167 status); 161 status);
168 162
169 return status; 163 return status;
@@ -188,8 +182,7 @@ static u32 pmgr_send_pwr_device_topology_to_pmu(struct gk20a *g)
188 (struct nv_pmu_boardobjgrp_super *)&pwr_desc_table); 182 (struct nv_pmu_boardobjgrp_super *)&pwr_desc_table);
189 183
190 if (status) { 184 if (status) {
191 gk20a_err(dev_from_gk20a(g), 185 nvgpu_err(g, "boardobjgrp_pmudatainit_legacy failed %x",
192 "boardobjgrp_pmudatainit_legacy failed %x",
193 status); 186 status);
194 goto exit; 187 goto exit;
195 } 188 }
@@ -204,8 +197,7 @@ static u32 pmgr_send_pwr_device_topology_to_pmu(struct gk20a *g)
204 &pwr_desc_table); 197 &pwr_desc_table);
205 198
206 if (status) 199 if (status)
207 gk20a_err(dev_from_gk20a(g), 200 nvgpu_err(g, "pmgr_pmu_set_object failed %x",
208 "pmgr_pmu_set_object failed %x",
209 status); 201 status);
210 202
211exit: 203exit:
@@ -233,8 +225,7 @@ static u32 pmgr_send_pwr_mointer_to_pmu(struct gk20a *g)
233 (struct nv_pmu_boardobjgrp_super *)&(pwr_monitor_pack.channels)); 225 (struct nv_pmu_boardobjgrp_super *)&(pwr_monitor_pack.channels));
234 226
235 if (status) { 227 if (status) {
236 gk20a_err(dev_from_gk20a(g), 228 nvgpu_err(g, "boardobjgrp_pmudatainit_legacy failed %x",
237 "boardobjgrp_pmudatainit_legacy failed %x",
238 status); 229 status);
239 goto exit; 230 goto exit;
240 } 231 }
@@ -253,8 +244,7 @@ static u32 pmgr_send_pwr_mointer_to_pmu(struct gk20a *g)
253 (struct nv_pmu_boardobjgrp_super *)&(pwr_monitor_pack.ch_rels)); 244 (struct nv_pmu_boardobjgrp_super *)&(pwr_monitor_pack.ch_rels));
254 245
255 if (status) { 246 if (status) {
256 gk20a_err(dev_from_gk20a(g), 247 nvgpu_err(g, "boardobjgrp_pmudatainit_legacy failed %x",
257 "boardobjgrp_pmudatainit_legacy failed %x",
258 status); 248 status);
259 goto exit; 249 goto exit;
260 } 250 }
@@ -271,8 +261,7 @@ static u32 pmgr_send_pwr_mointer_to_pmu(struct gk20a *g)
271 &pwr_monitor_pack); 261 &pwr_monitor_pack);
272 262
273 if (status) 263 if (status)
274 gk20a_err(dev_from_gk20a(g), 264 nvgpu_err(g, "pmgr_pmu_set_object failed %x",
275 "pmgr_pmu_set_object failed %x",
276 status); 265 status);
277 266
278exit: 267exit:
@@ -289,8 +278,7 @@ u32 pmgr_send_pwr_policy_to_pmu(struct gk20a *g)
289 278
290 ppwrpack = nvgpu_kzalloc(g, sizeof(struct nv_pmu_pmgr_pwr_policy_pack)); 279 ppwrpack = nvgpu_kzalloc(g, sizeof(struct nv_pmu_pmgr_pwr_policy_pack));
291 if (!ppwrpack) { 280 if (!ppwrpack) {
292 gk20a_err(dev_from_gk20a(g), 281 nvgpu_err(g, "pwr policy alloc failed %x",
293 "pwr policy alloc failed %x",
294 status); 282 status);
295 status = -ENOMEM; 283 status = -ENOMEM;
296 goto exit; 284 goto exit;
@@ -329,8 +317,7 @@ u32 pmgr_send_pwr_policy_to_pmu(struct gk20a *g)
329 status = ((struct boardobj *)ppolicy)->pmudatainit(g, (struct boardobj *)ppolicy, 317 status = ((struct boardobj *)ppolicy)->pmudatainit(g, (struct boardobj *)ppolicy,
330 (struct nv_pmu_boardobj *)&(ppwrpack->policies.policies[indx].data)); 318 (struct nv_pmu_boardobj *)&(ppwrpack->policies.policies[indx].data));
331 if (status) { 319 if (status) {
332 gk20a_err(dev_from_gk20a(g), 320 nvgpu_err(g, "pmudatainit failed %x indx %x",
333 "pmudatainit failed %x indx %x",
334 status, indx); 321 status, indx);
335 status = -ENOMEM; 322 status = -ENOMEM;
336 goto exit; 323 goto exit;
@@ -357,8 +344,7 @@ u32 pmgr_send_pwr_policy_to_pmu(struct gk20a *g)
357 ppwrpack); 344 ppwrpack);
358 345
359 if (status) 346 if (status)
360 gk20a_err(dev_from_gk20a(g), 347 nvgpu_err(g, "pmgr_pmu_set_object failed %x",
361 "pmgr_pmu_set_object failed %x",
362 status); 348 status);
363 349
364exit: 350exit:
@@ -403,7 +389,7 @@ u32 pmgr_pmu_pwr_devices_query_blocking(
403 (void *)&handlerparams, 389 (void *)&handlerparams,
404 &seqdesc, ~0); 390 &seqdesc, ~0);
405 if (status) { 391 if (status) {
406 gk20a_err(dev_from_gk20a(g), 392 nvgpu_err(g,
407 "unable to post pmgr query cmd for unit %x cmd id %x dev mask %x", 393 "unable to post pmgr query cmd for unit %x cmd id %x dev mask %x",
408 cmd.hdr.unit_id, pcmd->cmd_type, pcmd->dev_mask); 394 cmd.hdr.unit_id, pcmd->cmd_type, pcmd->dev_mask);
409 goto exit; 395 goto exit;
@@ -414,7 +400,7 @@ u32 pmgr_pmu_pwr_devices_query_blocking(
414 &handlerparams.success, 1); 400 &handlerparams.success, 1);
415 401
416 if (handlerparams.success == 0) { 402 if (handlerparams.success == 0) {
417 gk20a_err(dev_from_gk20a(g), "could not process cmd\n"); 403 nvgpu_err(g, "could not process cmd");
418 status = -ETIMEDOUT; 404 status = -ETIMEDOUT;
419 goto exit; 405 goto exit;
420 } 406 }
@@ -447,7 +433,7 @@ static u32 pmgr_pmu_load_blocking(struct gk20a *g)
447 (void *)&handlerparams, 433 (void *)&handlerparams,
448 &seqdesc, ~0); 434 &seqdesc, ~0);
449 if (status) { 435 if (status) {
450 gk20a_err(dev_from_gk20a(g), 436 nvgpu_err(g,
451 "unable to post pmgr load cmd for unit %x cmd id %x", 437 "unable to post pmgr load cmd for unit %x cmd id %x",
452 cmd.hdr.unit_id, pcmd->cmd_type); 438 cmd.hdr.unit_id, pcmd->cmd_type);
453 goto exit; 439 goto exit;
@@ -458,7 +444,7 @@ static u32 pmgr_pmu_load_blocking(struct gk20a *g)
458 &handlerparams.success, 1); 444 &handlerparams.success, 1);
459 445
460 if (handlerparams.success == 0) { 446 if (handlerparams.success == 0) {
461 gk20a_err(dev_from_gk20a(g), "could not process cmd\n"); 447 nvgpu_err(g, "could not process cmd");
462 status = -ETIMEDOUT; 448 status = -ETIMEDOUT;
463 goto exit; 449 goto exit;
464 } 450 }
@@ -474,7 +460,7 @@ u32 pmgr_send_pmgr_tables_to_pmu(struct gk20a *g)
474 status = pmgr_send_i2c_device_topology_to_pmu(g); 460 status = pmgr_send_i2c_device_topology_to_pmu(g);
475 461
476 if (status) { 462 if (status) {
477 gk20a_err(dev_from_gk20a(g), 463 nvgpu_err(g,
478 "pmgr_send_i2c_device_topology_to_pmu failed %x", 464 "pmgr_send_i2c_device_topology_to_pmu failed %x",
479 status); 465 status);
480 goto exit; 466 goto exit;
@@ -483,7 +469,7 @@ u32 pmgr_send_pmgr_tables_to_pmu(struct gk20a *g)
483 if (!BOARDOBJGRP_IS_EMPTY(&g->pmgr_pmu.pmgr_deviceobjs.super.super)) { 469 if (!BOARDOBJGRP_IS_EMPTY(&g->pmgr_pmu.pmgr_deviceobjs.super.super)) {
484 status = pmgr_send_pwr_device_topology_to_pmu(g); 470 status = pmgr_send_pwr_device_topology_to_pmu(g);
485 if (status) { 471 if (status) {
486 gk20a_err(dev_from_gk20a(g), 472 nvgpu_err(g,
487 "pmgr_send_pwr_device_topology_to_pmu failed %x", 473 "pmgr_send_pwr_device_topology_to_pmu failed %x",
488 status); 474 status);
489 goto exit; 475 goto exit;
@@ -496,7 +482,7 @@ u32 pmgr_send_pmgr_tables_to_pmu(struct gk20a *g)
496 &g->pmgr_pmu.pmgr_monitorobjs.pwr_ch_rels.super))) { 482 &g->pmgr_pmu.pmgr_monitorobjs.pwr_ch_rels.super))) {
497 status = pmgr_send_pwr_mointer_to_pmu(g); 483 status = pmgr_send_pwr_mointer_to_pmu(g);
498 if (status) { 484 if (status) {
499 gk20a_err(dev_from_gk20a(g), 485 nvgpu_err(g,
500 "pmgr_send_pwr_mointer_to_pmu failed %x", status); 486 "pmgr_send_pwr_mointer_to_pmu failed %x", status);
501 goto exit; 487 goto exit;
502 } 488 }
@@ -510,7 +496,7 @@ u32 pmgr_send_pmgr_tables_to_pmu(struct gk20a *g)
510 &g->pmgr_pmu.pmgr_policyobjs.pwr_violations.super))) { 496 &g->pmgr_pmu.pmgr_policyobjs.pwr_violations.super))) {
511 status = pmgr_send_pwr_policy_to_pmu(g); 497 status = pmgr_send_pwr_policy_to_pmu(g);
512 if (status) { 498 if (status) {
513 gk20a_err(dev_from_gk20a(g), 499 nvgpu_err(g,
514 "pmgr_send_pwr_policy_to_pmu failed %x", status); 500 "pmgr_send_pwr_policy_to_pmu failed %x", status);
515 goto exit; 501 goto exit;
516 } 502 }
@@ -518,7 +504,7 @@ u32 pmgr_send_pmgr_tables_to_pmu(struct gk20a *g)
518 504
519 status = pmgr_pmu_load_blocking(g); 505 status = pmgr_pmu_load_blocking(g);
520 if (status) { 506 if (status) {
521 gk20a_err(dev_from_gk20a(g), 507 nvgpu_err(g,
522 "pmgr_send_pwr_mointer_to_pmu failed %x", status); 508 "pmgr_send_pwr_mointer_to_pmu failed %x", status);
523 goto exit; 509 goto exit;
524 } 510 }
diff --git a/drivers/gpu/nvgpu/pmgr/pwrdev.c b/drivers/gpu/nvgpu/pmgr/pwrdev.c
index 0f87ad26..e32dfc40 100644
--- a/drivers/gpu/nvgpu/pmgr/pwrdev.c
+++ b/drivers/gpu/nvgpu/pmgr/pwrdev.c
@@ -54,7 +54,7 @@ static u32 _pwr_domains_pmudatainit_ina3221(struct gk20a *g,
54 54
55 status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata); 55 status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata);
56 if (status) { 56 if (status) {
57 gk20a_err(dev_from_gk20a(g), 57 nvgpu_err(g,
58 "error updating pmu boardobjgrp for pwr domain 0x%x", 58 "error updating pmu boardobjgrp for pwr domain 0x%x",
59 status); 59 status);
60 goto done; 60 goto done;
@@ -252,7 +252,7 @@ static u32 devinit_get_pwr_device_table(struct gk20a *g,
252 pwr_device_size, pwr_device_data.boardobj.type); 252 pwr_device_size, pwr_device_data.boardobj.type);
253 253
254 if (!boardobj) { 254 if (!boardobj) {
255 gk20a_err(dev_from_gk20a(g), 255 nvgpu_err(g,
256 "unable to create pwr device for %d type %d", index, pwr_device_data.boardobj.type); 256 "unable to create pwr device for %d type %d", index, pwr_device_data.boardobj.type);
257 status = -EINVAL; 257 status = -EINVAL;
258 goto done; 258 goto done;
@@ -262,7 +262,7 @@ static u32 devinit_get_pwr_device_table(struct gk20a *g,
262 boardobj, obj_index); 262 boardobj, obj_index);
263 263
264 if (status) { 264 if (status) {
265 gk20a_err(dev_from_gk20a(g), 265 nvgpu_err(g,
266 "unable to insert pwr device boardobj for %d", index); 266 "unable to insert pwr device boardobj for %d", index);
267 status = -EINVAL; 267 status = -EINVAL;
268 goto done; 268 goto done;
@@ -285,7 +285,7 @@ u32 pmgr_device_sw_setup(struct gk20a *g)
285 /* Construct the Super Class and override the Interfaces */ 285 /* Construct the Super Class and override the Interfaces */
286 status = boardobjgrpconstruct_e32(&g->pmgr_pmu.pmgr_deviceobjs.super); 286 status = boardobjgrpconstruct_e32(&g->pmgr_pmu.pmgr_deviceobjs.super);
287 if (status) { 287 if (status) {
288 gk20a_err(dev_from_gk20a(g), 288 nvgpu_err(g,
289 "error creating boardobjgrp for pmgr devices, status - 0x%x", 289 "error creating boardobjgrp for pmgr devices, status - 0x%x",
290 status); 290 status);
291 goto done; 291 goto done;
diff --git a/drivers/gpu/nvgpu/pmgr/pwrmonitor.c b/drivers/gpu/nvgpu/pmgr/pwrmonitor.c
index 685aa71a..05636001 100644
--- a/drivers/gpu/nvgpu/pmgr/pwrmonitor.c
+++ b/drivers/gpu/nvgpu/pmgr/pwrmonitor.c
@@ -80,7 +80,7 @@ static u32 _pwr_channel_state_init(struct gk20a *g)
80 BOARDOBJGRP_FOR_EACH_INDEX_IN_MASK(32, indx, objmask) { 80 BOARDOBJGRP_FOR_EACH_INDEX_IN_MASK(32, indx, objmask) {
81 pchannel = PMGR_PWR_MONITOR_GET_PWR_CHANNEL(g, indx); 81 pchannel = PMGR_PWR_MONITOR_GET_PWR_CHANNEL(g, indx);
82 if (pchannel == NULL) { 82 if (pchannel == NULL) {
83 gk20a_err(dev_from_gk20a(g), 83 nvgpu_err(g,
84 "PMGR_PWR_MONITOR_GET_PWR_CHANNEL-failed %d", indx); 84 "PMGR_PWR_MONITOR_GET_PWR_CHANNEL-failed %d", indx);
85 return -EINVAL; 85 return -EINVAL;
86 } 86 }
@@ -107,7 +107,7 @@ static u32 _pwr_domains_pmudatainit_sensor(struct gk20a *g,
107 107
108 status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata); 108 status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata);
109 if (status) { 109 if (status) {
110 gk20a_err(dev_from_gk20a(g), 110 nvgpu_err(g,
111 "error updating pmu boardobjgrp for pwr sensor 0x%x", 111 "error updating pmu boardobjgrp for pwr sensor 0x%x",
112 status); 112 status);
113 goto done; 113 goto done;
@@ -263,7 +263,7 @@ static u32 devinit_get_pwr_topology_table(struct gk20a *g,
263 pwr_topology_size, pwr_topology_data.boardobj.type); 263 pwr_topology_size, pwr_topology_data.boardobj.type);
264 264
265 if (!boardobj) { 265 if (!boardobj) {
266 gk20a_err(dev_from_gk20a(g), 266 nvgpu_err(g,
267 "unable to create pwr topology for %d type %d", 267 "unable to create pwr topology for %d type %d",
268 index, pwr_topology_data.boardobj.type); 268 index, pwr_topology_data.boardobj.type);
269 status = -EINVAL; 269 status = -EINVAL;
@@ -274,7 +274,7 @@ static u32 devinit_get_pwr_topology_table(struct gk20a *g,
274 boardobj, obj_index); 274 boardobj, obj_index);
275 275
276 if (status) { 276 if (status) {
277 gk20a_err(dev_from_gk20a(g), 277 nvgpu_err(g,
278 "unable to insert pwr topology boardobj for %d", index); 278 "unable to insert pwr topology boardobj for %d", index);
279 status = -EINVAL; 279 status = -EINVAL;
280 goto done; 280 goto done;
@@ -300,7 +300,7 @@ u32 pmgr_monitor_sw_setup(struct gk20a *g)
300 status = boardobjgrpconstruct_e32( 300 status = boardobjgrpconstruct_e32(
301 &g->pmgr_pmu.pmgr_monitorobjs.pwr_channels); 301 &g->pmgr_pmu.pmgr_monitorobjs.pwr_channels);
302 if (status) { 302 if (status) {
303 gk20a_err(dev_from_gk20a(g), 303 nvgpu_err(g,
304 "error creating boardobjgrp for pmgr channel, status - 0x%x", 304 "error creating boardobjgrp for pmgr channel, status - 0x%x",
305 status); 305 status);
306 goto done; 306 goto done;
@@ -315,7 +315,7 @@ u32 pmgr_monitor_sw_setup(struct gk20a *g)
315 status = boardobjgrpconstruct_e32( 315 status = boardobjgrpconstruct_e32(
316 &g->pmgr_pmu.pmgr_monitorobjs.pwr_ch_rels); 316 &g->pmgr_pmu.pmgr_monitorobjs.pwr_ch_rels);
317 if (status) { 317 if (status) {
318 gk20a_err(dev_from_gk20a(g), 318 nvgpu_err(g,
319 "error creating boardobjgrp for pmgr channel relationship, status - 0x%x", 319 "error creating boardobjgrp for pmgr channel relationship, status - 0x%x",
320 status); 320 status);
321 goto done; 321 goto done;
diff --git a/drivers/gpu/nvgpu/pmgr/pwrpolicy.c b/drivers/gpu/nvgpu/pmgr/pwrpolicy.c
index c2053469..e9329438 100644
--- a/drivers/gpu/nvgpu/pmgr/pwrpolicy.c
+++ b/drivers/gpu/nvgpu/pmgr/pwrpolicy.c
@@ -53,7 +53,7 @@ static u32 _pwr_policy_limitarbinputset_helper(struct gk20a *g,
53 p_limit_arb->num_inputs].limit_value = limit_value; 53 p_limit_arb->num_inputs].limit_value = limit_value;
54 p_limit_arb->num_inputs++; 54 p_limit_arb->num_inputs++;
55 } else { 55 } else {
56 gk20a_err(g->dev, "No entries remaining for clientIdx=%d", 56 nvgpu_err(g, "No entries remaining for clientIdx=%d",
57 client_idx); 57 client_idx);
58 status = -EINVAL; 58 status = -EINVAL;
59 } 59 }
@@ -100,7 +100,7 @@ static u32 _pwr_policy_limitid_translate(struct gk20a *g,
100 break; 100 break;
101 101
102 default: 102 default:
103 gk20a_err(g->dev, "Unsupported limitId=%d", 103 nvgpu_err(g, "Unsupported limitId=%d",
104 limit_id); 104 limit_id);
105 status = -EINVAL; 105 status = -EINVAL;
106 break; 106 break;
@@ -130,7 +130,7 @@ static u32 _pwr_policy_limitarbinputset(struct gk20a *g,
130 130
131 status = _pwr_policy_limitarbinputset_helper(g, p_limit_arb, client_idx, limit); 131 status = _pwr_policy_limitarbinputset_helper(g, p_limit_arb, client_idx, limit);
132 if (status) { 132 if (status) {
133 gk20a_err(g->dev, 133 nvgpu_err(g,
134 "Error setting client limit value: status=0x%08x, limitId=0x%x, clientIdx=0x%x, limit=%d", 134 "Error setting client limit value: status=0x%08x, limitId=0x%x, clientIdx=0x%x, limit=%d",
135 status, limit_id, client_idx, limit); 135 status, limit_id, client_idx, limit);
136 goto exit; 136 goto exit;
@@ -185,7 +185,7 @@ static u32 _pwr_domains_pmudatainit_hw_threshold(struct gk20a *g,
185 185
186 status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata); 186 status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata);
187 if (status) { 187 if (status) {
188 gk20a_err(dev_from_gk20a(g), 188 nvgpu_err(g,
189 "error updating pmu boardobjgrp for pwr sensor 0x%x", 189 "error updating pmu boardobjgrp for pwr sensor 0x%x",
190 status); 190 status);
191 status = -ENOMEM; 191 status = -ENOMEM;
@@ -294,8 +294,7 @@ static struct boardobj *construct_pwr_policy(struct gk20a *g,
294 break; 294 break;
295 295
296 default: 296 default:
297 gk20a_err(g->dev, 297 nvgpu_err(g, "Error: unrecognized Power Policy filter type: %d",
298 "Error: unrecognized Power Policy filter type: %d.\n",
299 pwrpolicy->filter_type); 298 pwrpolicy->filter_type);
300 } 299 }
301 300
@@ -385,7 +384,7 @@ static u32 _pwr_policy_construct_WAR_SW_Threshold_policy(struct gk20a *g,
385 pwr_policy_size, ppwrpolicydata->boardobj.type); 384 pwr_policy_size, ppwrpolicydata->boardobj.type);
386 385
387 if (!boardobj) { 386 if (!boardobj) {
388 gk20a_err(dev_from_gk20a(g), 387 nvgpu_err(g,
389 "unable to create pwr policy for type %d", ppwrpolicydata->boardobj.type); 388 "unable to create pwr policy for type %d", ppwrpolicydata->boardobj.type);
390 status = -EINVAL; 389 status = -EINVAL;
391 goto done; 390 goto done;
@@ -395,7 +394,7 @@ static u32 _pwr_policy_construct_WAR_SW_Threshold_policy(struct gk20a *g,
395 boardobj, obj_index); 394 boardobj, obj_index);
396 395
397 if (status) { 396 if (status) {
398 gk20a_err(dev_from_gk20a(g), 397 nvgpu_err(g,
399 "unable to insert pwr policy boardobj for %d", obj_index); 398 "unable to insert pwr policy boardobj for %d", obj_index);
400 status = -EINVAL; 399 status = -EINVAL;
401 goto done; 400 goto done;
@@ -659,7 +658,7 @@ static u32 devinit_get_pwr_policy_table(struct gk20a *g,
659 pwr_policy_size, pwr_policy_data.boardobj.type); 658 pwr_policy_size, pwr_policy_data.boardobj.type);
660 659
661 if (!boardobj) { 660 if (!boardobj) {
662 gk20a_err(dev_from_gk20a(g), 661 nvgpu_err(g,
663 "unable to create pwr policy for %d type %d", 662 "unable to create pwr policy for %d type %d",
664 index, pwr_policy_data.boardobj.type); 663 index, pwr_policy_data.boardobj.type);
665 status = -EINVAL; 664 status = -EINVAL;
@@ -670,7 +669,7 @@ static u32 devinit_get_pwr_policy_table(struct gk20a *g,
670 boardobj, obj_index); 669 boardobj, obj_index);
671 670
672 if (status) { 671 if (status) {
673 gk20a_err(dev_from_gk20a(g), 672 nvgpu_err(g,
674 "unable to insert pwr policy boardobj for %d", 673 "unable to insert pwr policy boardobj for %d",
675 index); 674 index);
676 status = -EINVAL; 675 status = -EINVAL;
@@ -687,8 +686,7 @@ static u32 devinit_get_pwr_policy_table(struct gk20a *g,
687 sizeof(struct pwr_policy_sw_threshold), 686 sizeof(struct pwr_policy_sw_threshold),
688 obj_index); 687 obj_index);
689 if (status) { 688 if (status) {
690 gk20a_err(dev_from_gk20a(g), 689 nvgpu_err(g, "unable to construct_WAR_policy");
691 "unable to construct_WAR_policy");
692 status = -EINVAL; 690 status = -EINVAL;
693 goto done; 691 goto done;
694 } 692 }
@@ -712,7 +710,7 @@ u32 pmgr_policy_sw_setup(struct gk20a *g)
712 status = boardobjgrpconstruct_e32( 710 status = boardobjgrpconstruct_e32(
713 &g->pmgr_pmu.pmgr_policyobjs.pwr_policies); 711 &g->pmgr_pmu.pmgr_policyobjs.pwr_policies);
714 if (status) { 712 if (status) {
715 gk20a_err(dev_from_gk20a(g), 713 nvgpu_err(g,
716 "error creating boardobjgrp for pmgr policy, status - 0x%x", 714 "error creating boardobjgrp for pmgr policy, status - 0x%x",
717 status); 715 status);
718 goto done; 716 goto done;
@@ -721,7 +719,7 @@ u32 pmgr_policy_sw_setup(struct gk20a *g)
721 status = boardobjgrpconstruct_e32( 719 status = boardobjgrpconstruct_e32(
722 &g->pmgr_pmu.pmgr_policyobjs.pwr_policy_rels); 720 &g->pmgr_pmu.pmgr_policyobjs.pwr_policy_rels);
723 if (status) { 721 if (status) {
724 gk20a_err(dev_from_gk20a(g), 722 nvgpu_err(g,
725 "error creating boardobjgrp for pmgr policy rels, status - 0x%x", 723 "error creating boardobjgrp for pmgr policy rels, status - 0x%x",
726 status); 724 status);
727 goto done; 725 goto done;
@@ -730,7 +728,7 @@ u32 pmgr_policy_sw_setup(struct gk20a *g)
730 status = boardobjgrpconstruct_e32( 728 status = boardobjgrpconstruct_e32(
731 &g->pmgr_pmu.pmgr_policyobjs.pwr_violations); 729 &g->pmgr_pmu.pmgr_policyobjs.pwr_violations);
732 if (status) { 730 if (status) {
733 gk20a_err(dev_from_gk20a(g), 731 nvgpu_err(g,
734 "error creating boardobjgrp for pmgr violations, status - 0x%x", 732 "error creating boardobjgrp for pmgr violations, status - 0x%x",
735 status); 733 status);
736 goto done; 734 goto done;