summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/pmgr
diff options
context:
space:
mode:
authorsmadhavan <smadhavan@nvidia.com>2018-09-11 01:01:06 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-09-19 05:38:29 -0400
commit2805f03aa0496502b64ff760f667bfe9d8a27928 (patch)
tree307dc9eaa38757a17c71d86c9b648be426a9b16e /drivers/gpu/nvgpu/pmgr
parentfbc5296e7d8a7eeceba9a904dd4736373c4c6d4e (diff)
nvgpu: pmgr: MISRA Rule 21.2 header guard fixes
MISRA rule 21.2 doesn't allow the use of macro names which start with an underscore. These leading underscores are to be removed from the macro names. This patch will fix such violations in pmgr by renaming them to follow the convention, 'NVGPU_PARENT-DIR_HEADER-NAME' when there is no keyword repetition between file name and directory or 'NVGPU_HEADER-NAME' when there is repetition. JIRA NVGPU-1028 Change-Id: I1beda400163bfc6278763161520f918fb4a3d096 Signed-off-by: smadhavan <smadhavan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1815663 Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/pmgr')
-rw-r--r--drivers/gpu/nvgpu/pmgr/pmgr.h6
-rw-r--r--drivers/gpu/nvgpu/pmgr/pmgrpmu.h6
-rw-r--r--drivers/gpu/nvgpu/pmgr/pwrdev.h6
-rw-r--r--drivers/gpu/nvgpu/pmgr/pwrmonitor.h6
-rw-r--r--drivers/gpu/nvgpu/pmgr/pwrpolicy.h6
5 files changed, 15 insertions, 15 deletions
diff --git a/drivers/gpu/nvgpu/pmgr/pmgr.h b/drivers/gpu/nvgpu/pmgr/pmgr.h
index 33daf8a9..9b142de0 100644
--- a/drivers/gpu/nvgpu/pmgr/pmgr.h
+++ b/drivers/gpu/nvgpu/pmgr/pmgr.h
@@ -21,8 +21,8 @@
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE. 22 * DEALINGS IN THE SOFTWARE.
23 */ 23 */
24#ifndef _PMGR_H_ 24#ifndef NVGPU_PMGR_H
25#define _PMGR_H_ 25#define NVGPU_PMGR_H
26 26
27#include "pwrdev.h" 27#include "pwrdev.h"
28#include "pwrmonitor.h" 28#include "pwrmonitor.h"
@@ -40,4 +40,4 @@ int pmgr_pwr_devices_get_current(struct gk20a *g, u32 *val);
40int pmgr_pwr_devices_get_voltage(struct gk20a *g, u32 *val); 40int pmgr_pwr_devices_get_voltage(struct gk20a *g, u32 *val);
41int pmgr_pwr_devices_get_power(struct gk20a *g, u32 *val); 41int pmgr_pwr_devices_get_power(struct gk20a *g, u32 *val);
42 42
43#endif 43#endif /* NVGPU_PMGR_H */
diff --git a/drivers/gpu/nvgpu/pmgr/pmgrpmu.h b/drivers/gpu/nvgpu/pmgr/pmgrpmu.h
index 23062b13..f4ffaef3 100644
--- a/drivers/gpu/nvgpu/pmgr/pmgrpmu.h
+++ b/drivers/gpu/nvgpu/pmgr/pmgrpmu.h
@@ -21,8 +21,8 @@
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE. 22 * DEALINGS IN THE SOFTWARE.
23 */ 23 */
24#ifndef _PMGRPMU_H_ 24#ifndef NVGPU_PMGRPMU_H
25#define _PMGRPMU_H_ 25#define NVGPU_PMGRPMU_H
26 26
27#include <nvgpu/gk20a.h> 27#include <nvgpu/gk20a.h>
28 28
@@ -36,4 +36,4 @@ u32 pmgr_pmu_pwr_devices_query_blocking(
36 u32 pwr_dev_mask, 36 u32 pwr_dev_mask,
37 struct nv_pmu_pmgr_pwr_devices_query_payload *ppayload); 37 struct nv_pmu_pmgr_pwr_devices_query_payload *ppayload);
38 38
39#endif 39#endif /* NVGPU_PMGRPMU_H */
diff --git a/drivers/gpu/nvgpu/pmgr/pwrdev.h b/drivers/gpu/nvgpu/pmgr/pwrdev.h
index 72cca1fb..4bcf65a7 100644
--- a/drivers/gpu/nvgpu/pmgr/pwrdev.h
+++ b/drivers/gpu/nvgpu/pmgr/pwrdev.h
@@ -21,8 +21,8 @@
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE. 22 * DEALINGS IN THE SOFTWARE.
23 */ 23 */
24#ifndef _PWRDEV_H_ 24#ifndef NVGPU_PMGR_PWRDEV_H
25#define _PWRDEV_H_ 25#define NVGPU_PMGR_PWRDEV_H
26 26
27#include "boardobj/boardobj.h" 27#include "boardobj/boardobj.h"
28#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h> 28#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
@@ -57,4 +57,4 @@ struct pwr_device_ina3221 {
57 57
58int pmgr_device_sw_setup(struct gk20a *g); 58int pmgr_device_sw_setup(struct gk20a *g);
59 59
60#endif 60#endif /* NVGPU_PMGR_PWRDEV_H */
diff --git a/drivers/gpu/nvgpu/pmgr/pwrmonitor.h b/drivers/gpu/nvgpu/pmgr/pwrmonitor.h
index da52b08a..bf4c76f9 100644
--- a/drivers/gpu/nvgpu/pmgr/pwrmonitor.h
+++ b/drivers/gpu/nvgpu/pmgr/pwrmonitor.h
@@ -21,8 +21,8 @@
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE. 22 * DEALINGS IN THE SOFTWARE.
23 */ 23 */
24#ifndef _PWRMONITOR_H_ 24#ifndef NVGPU_PMGR_PWRMONITOR_H
25#define _PWRMONITOR_H_ 25#define NVGPU_PMGR_PWRMONITOR_H
26 26
27#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h> 27#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
28#include "boardobj/boardobjgrp.h" 28#include "boardobj/boardobjgrp.h"
@@ -66,4 +66,4 @@ struct pmgr_pwr_monitor {
66 66
67int pmgr_monitor_sw_setup(struct gk20a *g); 67int pmgr_monitor_sw_setup(struct gk20a *g);
68 68
69#endif 69#endif /* NVGPU_PMGR_PWRMONITOR_H */
diff --git a/drivers/gpu/nvgpu/pmgr/pwrpolicy.h b/drivers/gpu/nvgpu/pmgr/pwrpolicy.h
index 12936a3e..868bc2cb 100644
--- a/drivers/gpu/nvgpu/pmgr/pwrpolicy.h
+++ b/drivers/gpu/nvgpu/pmgr/pwrpolicy.h
@@ -21,8 +21,8 @@
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE. 22 * DEALINGS IN THE SOFTWARE.
23 */ 23 */
24#ifndef _PWRPOLICY_H_ 24#ifndef NVGPU_PMGR_PWRPOLICY_H
25#define _PWRPOLICY_H_ 25#define NVGPU_PMGR_PWRPOLICY_H
26 26
27#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h> 27#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
28#include "boardobj/boardobjgrp.h" 28#include "boardobj/boardobjgrp.h"
@@ -133,4 +133,4 @@ union pwr_policy_data_union {
133 133
134int pmgr_policy_sw_setup(struct gk20a *g); 134int pmgr_policy_sw_setup(struct gk20a *g);
135 135
136#endif 136#endif /* NVGPU_PMGR_PWRPOLICY_H */