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| author | Seema Khowala <seemaj@nvidia.com> | 2018-11-28 12:49:08 -0500 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-12-29 02:51:32 -0500 |
| commit | 0d110b75228251f9ac17058f6daa3523b5909691 (patch) | |
| tree | 6587c8a8c4f4cd1c4f7a818202db37ba04b69c9f /drivers/gpu/nvgpu/pmgr/pwrpolicy.h | |
| parent | bb9c8e4e29e35fadf050c7428dcb0e50549cc8c1 (diff) | |
gpu: nvgpu: clear all handled fifo interrupts
Issue is that local variable clear_intr is reset if fifo intr
handler happens to handle interrupts handled by fifo_error_isr.
This fix is to take care of clearing all handled fifo interrupts.
Bug 2361571
Change-Id: Ic8fe2294cfb25c58925942750a81c104ec9747de
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1960330
(cherry picked from commit 1195239d1c624e600ec4152374c493e887a90774
in dev-kernel)
Reviewed-on: https://git-master.nvidia.com/r/1979744
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/pmgr/pwrpolicy.h')
0 files changed, 0 insertions, 0 deletions