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author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2016-11-14 00:57:38 -0500 |
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committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-01-17 11:15:12 -0500 |
commit | efe0758081f25b39d5bb8b097fc0ae64d0e47c3f (patch) | |
tree | f99d333adfb8db97524508d2b81beec1164e9fde /drivers/gpu/nvgpu/pmgr/pwrpolicy.c | |
parent | 157ff622f3156a68281a5d1c0eb97bc8ad3a5b3b (diff) |
gpu: nvgpu: fix pmu->mscg_stat optimization issue
- with help of WRITE_ONCE() & ACCESS_ONCE()
make sure variable pmu->mscg_stat read/write goes through
without optimization
- Added WRITE_ONCE() define for kernel-3.18 version & below
to support backward compatibility
issue: inconsistencies on getting MSCG to trigger consistently in P5
due to a lack of memory barrier around and volatile accesses to the
variable pmu->mscg_stat
JIRA DNVGPU-71
Change-Id: I04d30493d42c52710304dbdfb9cb4a1e9a76f2c0
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1252524
(cherry picked from commit 8af7fc68e7ab06a856ba4ef4e44de7336682361b)
Reviewed-on: http://git-master/r/1271614
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/pmgr/pwrpolicy.c')
0 files changed, 0 insertions, 0 deletions