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author | Terje Bergstrom <tbergstrom@nvidia.com> | 2017-03-15 15:45:08 -0400 |
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committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-03-21 15:08:13 -0400 |
commit | 467d0b1a19fd703ee10bc183c15ffef83f71a644 (patch) | |
tree | 59e5a8bc4b615185af9953de3db2d03cfbc02541 /drivers/gpu/nvgpu/pmgr/pwrpolicy.c | |
parent | 51f3f542fabb31527024eba5b8f52bf87cc30659 (diff) |
gpu: nvgpu: Don't query engine id for inval engine
When we get a PBDMA MMU fault, we won't be able to map the MMU id
into an engine id for reset. We still pass FIFO_INVAL_ENGINE_ID to
gk20a_fifo_should_defer_engine_reset() which causes an unnecessary
debug spew.
Check for FIFO_INVAL_ENGINE before calling
gk20a_fifo_should_defer_engine_reset().
Change-Id: I6f4a49be194cbc6070c1a1c667059de2ea79790f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1321492
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/pmgr/pwrpolicy.c')
0 files changed, 0 insertions, 0 deletions