diff options
author | smadhavan <smadhavan@nvidia.com> | 2018-09-06 04:38:00 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-09-12 08:36:04 -0400 |
commit | c7a3b6db10900e0aabc29ca7307908875d685036 (patch) | |
tree | 1ee88207c5149344841b1423d0cb920498f844b0 /drivers/gpu/nvgpu/pmgr/pwrmonitor.c | |
parent | c615002d22b4675d08404eb7cc7087d4418eccdb (diff) |
gpu: nvgpu: Fix MISRA 15.6 violations
MISRA Rule-15.6 requires that all if-else blocks be enclosed in braces,
including single statement blocks. Fix errors due to single statement
if blocks without braces by introducing the braces.
JIRA NVGPU-671
Change-Id: I8046a09fa7ffc74c3d737ba57132a0a9ae2ff195
Signed-off-by: smadhavan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1797699
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/pmgr/pwrmonitor.c')
-rw-r--r-- | drivers/gpu/nvgpu/pmgr/pwrmonitor.c | 18 |
1 files changed, 12 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/pmgr/pwrmonitor.c b/drivers/gpu/nvgpu/pmgr/pwrmonitor.c index 53c7a1c4..9b2f91de 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrmonitor.c +++ b/drivers/gpu/nvgpu/pmgr/pwrmonitor.c | |||
@@ -40,8 +40,9 @@ static int _pwr_channel_pmudata_instget(struct gk20a *g, | |||
40 | 40 | ||
41 | /*check whether pmuboardobjgrp has a valid boardobj in index*/ | 41 | /*check whether pmuboardobjgrp has a valid boardobj in index*/ |
42 | if (((u32)BIT(idx) & | 42 | if (((u32)BIT(idx) & |
43 | ppmgrchannel->hdr.data.super.obj_mask.super.data[0]) == 0) | 43 | ppmgrchannel->hdr.data.super.obj_mask.super.data[0]) == 0) { |
44 | return -EINVAL; | 44 | return -EINVAL; |
45 | } | ||
45 | 46 | ||
46 | *ppboardobjpmudata = (struct nv_pmu_boardobj *) | 47 | *ppboardobjpmudata = (struct nv_pmu_boardobj *) |
47 | &ppmgrchannel->channels[idx].data.board_obj; | 48 | &ppmgrchannel->channels[idx].data.board_obj; |
@@ -66,8 +67,9 @@ static int _pwr_channel_rels_pmudata_instget(struct gk20a *g, | |||
66 | 67 | ||
67 | /*check whether pmuboardobjgrp has a valid boardobj in index*/ | 68 | /*check whether pmuboardobjgrp has a valid boardobj in index*/ |
68 | if (((u32)BIT(idx) & | 69 | if (((u32)BIT(idx) & |
69 | ppmgrchrels->hdr.data.super.obj_mask.super.data[0]) == 0) | 70 | ppmgrchrels->hdr.data.super.obj_mask.super.data[0]) == 0) { |
70 | return -EINVAL; | 71 | return -EINVAL; |
72 | } | ||
71 | 73 | ||
72 | *ppboardobjpmudata = (struct nv_pmu_boardobj *) | 74 | *ppboardobjpmudata = (struct nv_pmu_boardobj *) |
73 | &ppmgrchrels->ch_rels[idx].data.board_obj; | 75 | &ppmgrchrels->ch_rels[idx].data.board_obj; |
@@ -150,8 +152,9 @@ static struct boardobj *construct_pwr_topology(struct gk20a *g, | |||
150 | 152 | ||
151 | status = boardobj_construct_super(g, &board_obj_ptr, | 153 | status = boardobj_construct_super(g, &board_obj_ptr, |
152 | pargs_size, pargs); | 154 | pargs_size, pargs); |
153 | if (status) | 155 | if (status) { |
154 | return NULL; | 156 | return NULL; |
157 | } | ||
155 | 158 | ||
156 | pwrchannel = (struct pwr_channel_sensor*)board_obj_ptr; | 159 | pwrchannel = (struct pwr_channel_sensor*)board_obj_ptr; |
157 | 160 | ||
@@ -253,8 +256,9 @@ static int devinit_get_pwr_topology_table(struct gk20a *g, | |||
253 | NV_VBIOS_POWER_TOPOLOGY_2X_ENTRY_PARAM1_SENSOR_PROVIDER_INDEX); | 256 | NV_VBIOS_POWER_TOPOLOGY_2X_ENTRY_PARAM1_SENSOR_PROVIDER_INDEX); |
254 | 257 | ||
255 | pwr_topology_size = sizeof(struct pwr_channel_sensor); | 258 | pwr_topology_size = sizeof(struct pwr_channel_sensor); |
256 | } else | 259 | } else { |
257 | continue; | 260 | continue; |
261 | } | ||
258 | 262 | ||
259 | /* Initialize data for the parent class */ | 263 | /* Initialize data for the parent class */ |
260 | pwr_topology_data.boardobj.type = CTRL_PMGR_PWR_CHANNEL_TYPE_SENSOR; | 264 | pwr_topology_data.boardobj.type = CTRL_PMGR_PWR_CHANNEL_TYPE_SENSOR; |
@@ -345,12 +349,14 @@ int pmgr_monitor_sw_setup(struct gk20a *g) | |||
345 | ppwrmonitorobjs = &(g->pmgr_pmu.pmgr_monitorobjs); | 349 | ppwrmonitorobjs = &(g->pmgr_pmu.pmgr_monitorobjs); |
346 | 350 | ||
347 | status = devinit_get_pwr_topology_table(g, ppwrmonitorobjs); | 351 | status = devinit_get_pwr_topology_table(g, ppwrmonitorobjs); |
348 | if (status) | 352 | if (status) { |
349 | goto done; | 353 | goto done; |
354 | } | ||
350 | 355 | ||
351 | status = _pwr_channel_state_init(g); | 356 | status = _pwr_channel_state_init(g); |
352 | if (status) | 357 | if (status) { |
353 | goto done; | 358 | goto done; |
359 | } | ||
354 | 360 | ||
355 | /* Initialise physicalChannelMask */ | 361 | /* Initialise physicalChannelMask */ |
356 | g->pmgr_pmu.pmgr_monitorobjs.physical_channel_mask = 0; | 362 | g->pmgr_pmu.pmgr_monitorobjs.physical_channel_mask = 0; |